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authorSanjiv Gupta <sanjiv.gupta@microchip.com>2009-04-09 04:03:43 +0000
committerSanjiv Gupta <sanjiv.gupta@microchip.com>2009-04-09 04:03:43 +0000
commit6e2a46a0b40512f4724c40db675cf307dba22660 (patch)
tree144539f3a7fb99c2557708c1de3558d1aa11aaa1 /lib/Target/PIC16/PIC16ISelLowering.cpp
parent57fc82d409022e793446c1c5d7d6d8b0d7579f83 (diff)
r68576 unconverd a bug in PIC16 port (Thanks to Dan Gohman) where we were custom lowering an ADD to ADDC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68671 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PIC16/PIC16ISelLowering.cpp')
-rw-r--r--lib/Target/PIC16/PIC16ISelLowering.cpp15
1 files changed, 10 insertions, 5 deletions
diff --git a/lib/Target/PIC16/PIC16ISelLowering.cpp b/lib/Target/PIC16/PIC16ISelLowering.cpp
index c8e58a6543..5996d886ad 100644
--- a/lib/Target/PIC16/PIC16ISelLowering.cpp
+++ b/lib/Target/PIC16/PIC16ISelLowering.cpp
@@ -1359,21 +1359,26 @@ SDValue PIC16TargetLowering::LowerADD(SDValue Op, SelectionDAG &DAG) {
// Put one value on stack.
SDValue NewVal = ConvertToMemOperand (Op.getOperand(MemOp), DAG, dl);
+ // ADDC and ADDE produces two results.
SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Flag);
+ // ADDE has three operands, the last one is a flag.
if (Op.getOpcode() == ISD::ADDE)
return DAG.getNode(Op.getOpcode(), dl, Tys, Op.getOperand(MemOp ^ 1),
NewVal, Op.getOperand(2));
- else
+ // ADDC has two operands.
+ else if (Op.getOpcode() == ISD::ADDC)
return DAG.getNode(Op.getOpcode(), dl, Tys, Op.getOperand(MemOp ^ 1),
NewVal);
+ // ADD it is. It produces only one result.
+ else
+ return DAG.getNode(Op.getOpcode(), dl, MVT::i8, Op.getOperand(MemOp ^ 1),
+ NewVal);
}
- else if (Op.getOpcode() == ISD::ADD) {
+ else if (Op.getOpcode() == ISD::ADD)
return Op;
- }
- else {
+ else
return SDValue();
- }
}
SDValue PIC16TargetLowering::LowerSUB(SDValue Op, SelectionDAG &DAG) {