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authorChris Lattner <sabre@nondot.org>2010-01-20 06:34:14 +0000
committerChris Lattner <sabre@nondot.org>2010-01-20 06:34:14 +0000
commit8eeba35babf3114966fc4e6e8522057e46b610db (patch)
treeac7cb188d3d10049dc657fb5c1024e94abdb6bcb /lib/Target/Mips/MipsTargetMachine.cpp
parent6f8694b272ffbd5b4746feccd4866bf89794fe86 (diff)
revert 93934, removing the MCAsmInfo endianness bit. I can't
stomache MCAsmInfo having this, and I found a better solution to this layering issue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93985 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsTargetMachine.cpp')
-rw-r--r--lib/Target/Mips/MipsTargetMachine.cpp7
1 files changed, 4 insertions, 3 deletions
diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp
index 1168fef66e..4724ff7d34 100644
--- a/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/lib/Target/Mips/MipsTargetMachine.cpp
@@ -22,8 +22,8 @@ extern "C" void LLVMInitializeMipsTarget() {
// Register the target.
RegisterTargetMachine<MipsTargetMachine> X(TheMipsTarget);
RegisterTargetMachine<MipselTargetMachine> Y(TheMipselTarget);
- RegisterAsmInfo<MipsBEMCAsmInfo> A(TheMipsTarget);
- RegisterAsmInfo<MipsLEMCAsmInfo> B(TheMipselTarget);
+ RegisterAsmInfo<MipsMCAsmInfo> A(TheMipsTarget);
+ RegisterAsmInfo<MipsMCAsmInfo> B(TheMipselTarget);
}
// DataLayout --> Big-endian, 32-bit pointer/ABI/alignment
@@ -60,7 +60,8 @@ MipselTargetMachine(const Target &T, const std::string &TT,
// Install an instruction selector pass using
// the ISelDag to gen Mips code.
bool MipsTargetMachine::
-addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel) {
+addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel)
+{
PM.add(createMipsISelDag(*this));
return false;
}