diff options
| author | Jack Carter <jcarter@mips.com> | 2012-08-09 19:43:18 +0000 |
|---|---|---|
| committer | Jack Carter <jcarter@mips.com> | 2012-08-09 19:43:18 +0000 |
| commit | 8d7e5efcaa5a1625e9518d090697f08d6d1110d5 (patch) | |
| tree | 501b2d9d475fd38a963efe5451907ec05a31ecda /lib/Target/Mips/Mips64InstrInfo.td | |
| parent | bcc4c1d2d1b6877418de92835c537d79d44363a6 (diff) | |
Another 32 to 64 bit sign extension bug.
The fields in the td definition were switched.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161607 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips64InstrInfo.td')
| -rw-r--r-- | lib/Target/Mips/Mips64InstrInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Mips/Mips64InstrInfo.td b/lib/Target/Mips/Mips64InstrInfo.td index 5bebc4f245..20fc178077 100644 --- a/lib/Target/Mips/Mips64InstrInfo.td +++ b/lib/Target/Mips/Mips64InstrInfo.td @@ -220,7 +220,7 @@ def DEXT : ExtBase<3, "dext", CPU64Regs>; def DINS : InsBase<7, "dins", CPU64Regs>; let isCodeGenOnly = 1, rs = 0, shamt = 0 in { - def DSLL64_32 : FR<0x3c, 0x00, (outs CPU64Regs:$rd), (ins CPURegs:$rt), + def DSLL64_32 : FR<0x00, 0x3c, (outs CPU64Regs:$rd), (ins CPURegs:$rt), "dsll\t$rd, $rt, 32", [], IIAlu>; def SLL64_32 : FR<0x0, 0x00, (outs CPU64Regs:$rd), (ins CPURegs:$rt), "sll\t$rd, $rt, 0", [], IIAlu>; |