diff options
| author | Jyotsna Verma <jverma@codeaurora.org> | 2013-02-14 19:57:17 +0000 |
|---|---|---|
| committer | Jyotsna Verma <jverma@codeaurora.org> | 2013-02-14 19:57:17 +0000 |
| commit | 84a2c2bbb58dd0f91608d8d14b3139b9295ca036 (patch) | |
| tree | 43af97a73e22ca64edfe2021f2c92ad16a6ba594 /lib/Target/Hexagon/HexagonInstrInfo.td | |
| parent | aefd14be3951d5b84cda5561655fe63549819d25 (diff) | |
Hexagon: Change insn class to support instruction encoding.
This patch doesn't introduce any functionality changes.
It adds some new fields to the Hexagon instruction classes and
changes their layout to support instruction encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175205 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonInstrInfo.td')
| -rw-r--r-- | lib/Target/Hexagon/HexagonInstrInfo.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/Hexagon/HexagonInstrInfo.td b/lib/Target/Hexagon/HexagonInstrInfo.td index ac2dd22e21..082772a042 100644 --- a/lib/Target/Hexagon/HexagonInstrInfo.td +++ b/lib/Target/Hexagon/HexagonInstrInfo.td @@ -1885,7 +1885,7 @@ def SDHexagonBARRIER: SDTypeProfile<0, 0, []>; def HexagonBARRIER: SDNode<"HexagonISD::BARRIER", SDHexagonBARRIER, [SDNPHasChain]>; -let hasSideEffects = 1, isHexagonSolo = 1 in +let hasSideEffects = 1, isSolo = 1 in def BARRIER : SYSInst<(outs), (ins), "barrier", [(HexagonBARRIER)]>; @@ -1960,9 +1960,9 @@ def LOOP0_r : CRInst<(outs), (ins brtarget:$offset, IntRegs:$src2), let isBranch = 1, isTerminator = 1, neverHasSideEffects = 1, Defs = [PC, LC0], Uses = [SA0, LC0] in { -def ENDLOOP0 : Marker<(outs), (ins brtarget:$offset), - ":endloop0", - []>; +def ENDLOOP0 : Endloop<(outs), (ins brtarget:$offset), + ":endloop0", + []>; } // Support for generating global address. |