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authorOwen Anderson <resistor@mac.com>2007-12-31 06:32:00 +0000
committerOwen Anderson <resistor@mac.com>2007-12-31 06:32:00 +0000
commitd10fd9791c20fd8368fa0ce94b626b769c6c8ba0 (patch)
tree15d4f8237ffa7600737fab617923b5bef3267b16 /lib/Target/CellSPU/SPUInstrInfo.cpp
parentf20c1a497fe3922ac718429d65a5fe396890575e (diff)
Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
Machine-level API cleanup instigated by Chris. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45470 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU/SPUInstrInfo.cpp')
-rw-r--r--lib/Target/CellSPU/SPUInstrInfo.cpp37
1 files changed, 37 insertions, 0 deletions
diff --git a/lib/Target/CellSPU/SPUInstrInfo.cpp b/lib/Target/CellSPU/SPUInstrInfo.cpp
index 1b321b6eb1..0e5c505728 100644
--- a/lib/Target/CellSPU/SPUInstrInfo.cpp
+++ b/lib/Target/CellSPU/SPUInstrInfo.cpp
@@ -180,3 +180,40 @@ SPUInstrInfo::isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const {
}
return 0;
}
+
+void SPUInstrInfo::copyRegToReg(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MI,
+ unsigned DestReg, unsigned SrcReg,
+ const TargetRegisterClass *DestRC,
+ const TargetRegisterClass *SrcRC) const
+{
+ if (DestRC != SrcRC) {
+ cerr << "SPURegisterInfo::copyRegToReg(): DestRC != SrcRC not supported!\n";
+ abort();
+ }
+
+ if (DestRC == SPU::R8CRegisterClass) {
+ BuildMI(MBB, MI, get(SPU::ORBIr8), DestReg).addReg(SrcReg).addImm(0);
+ } else if (DestRC == SPU::R16CRegisterClass) {
+ BuildMI(MBB, MI, get(SPU::ORHIr16), DestReg).addReg(SrcReg).addImm(0);
+ } else if (DestRC == SPU::R32CRegisterClass) {
+ BuildMI(MBB, MI, get(SPU::ORIr32), DestReg).addReg(SrcReg).addImm(0);
+ } else if (DestRC == SPU::R32FPRegisterClass) {
+ BuildMI(MBB, MI, get(SPU::ORf32), DestReg).addReg(SrcReg)
+ .addReg(SrcReg);
+ } else if (DestRC == SPU::R64CRegisterClass) {
+ BuildMI(MBB, MI, get(SPU::ORIr64), DestReg).addReg(SrcReg).addImm(0);
+ } else if (DestRC == SPU::R64FPRegisterClass) {
+ BuildMI(MBB, MI, get(SPU::ORf64), DestReg).addReg(SrcReg)
+ .addReg(SrcReg);
+ } else if (DestRC == SPU::GPRCRegisterClass) {
+ BuildMI(MBB, MI, get(SPU::ORgprc), DestReg).addReg(SrcReg)
+ .addReg(SrcReg);
+ } else if (DestRC == SPU::VECREGRegisterClass) {
+ BuildMI(MBB, MI, get(SPU::ORv4i32), DestReg).addReg(SrcReg)
+ .addReg(SrcReg);
+ } else {
+ std::cerr << "Attempt to copy unknown/unsupported register class!\n";
+ abort();
+ }
+}