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| author | Duncan Sands <baldrick@free.fr> | 2011-08-12 14:54:45 +0000 |
|---|---|---|
| committer | Duncan Sands <baldrick@free.fr> | 2011-08-12 14:54:45 +0000 |
| commit | 1f6a329f79b3568d379142f921f59c4143ddaa14 (patch) | |
| tree | 48a398f7238e67041a4f73e6f65440be845523cb /lib/Target/CellSPU/SPUISelLowering.cpp | |
| parent | 3c757ef2ef8294ea34378804d7c4d71053588b8c (diff) | |
Silence a bunch (but not all) "variable written but not read" warnings
when building with assertions disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137460 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU/SPUISelLowering.cpp')
| -rw-r--r-- | lib/Target/CellSPU/SPUISelLowering.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/CellSPU/SPUISelLowering.cpp b/lib/Target/CellSPU/SPUISelLowering.cpp index 59337bceff..1a081e9e6d 100644 --- a/lib/Target/CellSPU/SPUISelLowering.cpp +++ b/lib/Target/CellSPU/SPUISelLowering.cpp @@ -2728,6 +2728,7 @@ static SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG) // the type to extend from needs to be i64 or i32. assert((OpVT == MVT::i128 && (Op0VT == MVT::i64 || Op0VT == MVT::i32)) && "LowerSIGN_EXTEND: input and/or output operand have wrong size"); + (void)OpVT; // Create shuffle mask unsigned mask1 = 0x10101010; // byte 0 - 3 and 4 - 7 |