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authorScott Michel <scottm@aero.org>2009-01-06 23:10:38 +0000
committerScott Michel <scottm@aero.org>2009-01-06 23:10:38 +0000
commit21213e75b57f87182cbfa7cd8f55a37bcb7c4097 (patch)
tree61675cf2d1a951ef11d3cec9ec0678af229a85dc /lib/Target/CellSPU/SPUCallingConv.td
parent2c91d102ec29bc766b7172a3062d399dc12640fe (diff)
CellSPU:
- Add preliminary support for v2i32; load/store generates the right code but there's a lot work to be done to make this vector type operational. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61829 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU/SPUCallingConv.td')
-rw-r--r--lib/Target/CellSPU/SPUCallingConv.td13
1 files changed, 7 insertions, 6 deletions
diff --git a/lib/Target/CellSPU/SPUCallingConv.td b/lib/Target/CellSPU/SPUCallingConv.td
index 5213e42452..10dc837d90 100644
--- a/lib/Target/CellSPU/SPUCallingConv.td
+++ b/lib/Target/CellSPU/SPUCallingConv.td
@@ -21,13 +21,14 @@ class CCIfSubtarget<string F, CCAction A>
// Return-value convention for Cell SPU: Everything can be passed back via $3:
def RetCC_SPU : CallingConv<[
- CCIfType<[i8], CCAssignToReg<[R3]>>,
- CCIfType<[i16], CCAssignToReg<[R3]>>,
- CCIfType<[i32], CCAssignToReg<[R3]>>,
- CCIfType<[i64], CCAssignToReg<[R3]>>,
- CCIfType<[i128], CCAssignToReg<[R3]>>,
+ CCIfType<[i8], CCAssignToReg<[R3]>>,
+ CCIfType<[i16], CCAssignToReg<[R3]>>,
+ CCIfType<[i32], CCAssignToReg<[R3]>>,
+ CCIfType<[i64], CCAssignToReg<[R3]>>,
+ CCIfType<[i128], CCAssignToReg<[R3]>>,
CCIfType<[f32, f64], CCAssignToReg<[R3]>>,
- CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToReg<[R3]>>
+ CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToReg<[R3]>>,
+ CCIfType<[v2i32], CCAssignToReg<[R3]>>
]>;