diff options
| author | Scott Michel <scottm@aero.org> | 2008-11-24 17:11:17 +0000 |
|---|---|---|
| committer | Scott Michel <scottm@aero.org> | 2008-11-24 17:11:17 +0000 |
| commit | 104de4390b9bb0030ae81408c3d173ed6053378d (patch) | |
| tree | d3fdeef9e8982402dd66b320d39f6ca7f450a8b4 /lib/Target/CellSPU/README.txt | |
| parent | fd9ddc066e4ad42b62cd5bf41871c3927c17d0f4 (diff) | |
CellSPU:
(a) Improve the extract element code: there's no need to do gymnastics with
rotates into the preferred slot if a shuffle will do the same thing.
(b) Rename a couple of SPUISD pseudo-instructions for readability and better
semantic correspondence.
(c) Fix i64 sign/any/zero extension lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59965 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU/README.txt')
| -rw-r--r-- | lib/Target/CellSPU/README.txt | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/Target/CellSPU/README.txt b/lib/Target/CellSPU/README.txt index 1d90f2a77c..7ce19da834 100644 --- a/lib/Target/CellSPU/README.txt +++ b/lib/Target/CellSPU/README.txt @@ -8,6 +8,7 @@ Department in The Aerospace Corporation: - Mark Thomas (floating point instructions) - Michael AuYeung (intrinsics) - Chandler Carruth (LLVM expertise) +- Nehal Desai (debugging, RoadRunner SPU expertise) THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF @@ -33,6 +34,11 @@ to add 'spu' to configure's --enable-targets option, e.g.: --------------------------------------------------------------------------- +The unofficially official status page (because it's not easy to get an +officially blessed external web page from either IBM Austin or Aerosapce): + + http://sites.google.com/site/llvmcellspu/ + TODO: * Finish branch instructions, branch prediction |