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authorChris Lattner <sabre@nondot.org>2009-09-13 20:31:40 +0000
committerChris Lattner <sabre@nondot.org>2009-09-13 20:31:40 +0000
commit762ccea600158bb317dcccdff3303e942426cb71 (patch)
treebdebd66dc5839c531daa0e8cb60d1a0d85793399 /lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
parentd95148f073c31924f275a34296da52a7cdefad91 (diff)
remove all but one reference to TargetRegisterDesc::AsmName.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81714 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp')
-rw-r--r--lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp6
1 files changed, 2 insertions, 4 deletions
diff --git a/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp b/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
index 49023688f7..475477337a 100644
--- a/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
+++ b/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
@@ -75,7 +75,7 @@ void AlphaAsmPrinter::printOperand(const MachineInstr *MI, int opNum)
if (MO.getType() == MachineOperand::MO_Register) {
assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
"Not physreg??");
- O << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
+ O << getRegisterName(MO.getReg());
} else if (MO.isImm()) {
O << MO.getImm();
assert(MO.getImm() < (1 << 30));
@@ -86,11 +86,9 @@ void AlphaAsmPrinter::printOperand(const MachineInstr *MI, int opNum)
void AlphaAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) {
- const TargetRegisterInfo &RI = *TM.getRegisterInfo();
-
switch (MO.getType()) {
case MachineOperand::MO_Register:
- O << RI.get(MO.getReg()).AsmName;
+ O << getRegisterName(MO.getReg());
return;
case MachineOperand::MO_Immediate: