diff options
author | Andrew Lenharth <andrewl@lenharth.org> | 2005-01-30 00:35:27 +0000 |
---|---|---|
committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-01-30 00:35:27 +0000 |
commit | 684f22989597ac00f493eca91be798ad0cb401f5 (patch) | |
tree | 8c3e4ee059f4b084cfeefb6529fa2f307ffd264a /lib/Target/Alpha/AlphaRegisterInfo.cpp | |
parent | bbec41dbaca7ced24f77ec7173f0c1e317aae908 (diff) |
support for larger calls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19932 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaRegisterInfo.cpp')
-rw-r--r-- | lib/Target/Alpha/AlphaRegisterInfo.cpp | 78 |
1 files changed, 34 insertions, 44 deletions
diff --git a/lib/Target/Alpha/AlphaRegisterInfo.cpp b/lib/Target/Alpha/AlphaRegisterInfo.cpp index 705b849984..a35c210d20 100644 --- a/lib/Target/Alpha/AlphaRegisterInfo.cpp +++ b/lib/Target/Alpha/AlphaRegisterInfo.cpp @@ -49,7 +49,7 @@ AlphaRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB, unsigned SrcReg, int FrameIdx) const { //std::cerr << "Trying to store " << getPrettyName(SrcReg) << " to " << FrameIdx << "\n"; //BuildMI(MBB, MI, Alpha::WTF, 0).addReg(SrcReg); - BuildMI(MBB, MI, Alpha::STQ, 3).addReg(SrcReg).addFrameIndex(FrameIdx); + BuildMI(MBB, MI, Alpha::STQ, 3).addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31); // assert(0 && "TODO"); } @@ -59,7 +59,7 @@ AlphaRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, unsigned DestReg, int FrameIdx) const{ //std::cerr << "Trying to load " << getPrettyName(DestReg) << " to " << FrameIdx << "\n"; //BuildMI(MBB, MI, Alpha::WTF, 0, DestReg); - BuildMI(MBB, MI, Alpha::LDQ, 2, DestReg).addFrameIndex(FrameIdx); + BuildMI(MBB, MI, Alpha::LDQ, 2, DestReg).addFrameIndex(FrameIdx).addReg(Alpha::F31); // assert(0 && "TODO"); } @@ -128,53 +128,35 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, void AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const { - assert(0 && "TODO"); -// unsigned i = 0; -// MachineInstr &MI = *II; -// MachineBasicBlock &MBB = *MI.getParent(); -// MachineFunction &MF = *MBB.getParent(); + unsigned i = 0; + MachineInstr &MI = *II; + MachineBasicBlock &MBB = *MI.getParent(); + MachineFunction &MF = *MBB.getParent(); -// while (!MI.getOperand(i).isFrameIndex()) { -// ++i; -// assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); -// } - -// int FrameIndex = MI.getOperand(i).getFrameIndex(); + while (!MI.getOperand(i).isFrameIndex()) { + ++i; + assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); + } -// // Replace the FrameIndex with base register with GPR1 (SP) or GPR31 (FP). -// MI.SetMachineOperandReg(i, hasFP(MF) ? PPC::R31 : PPC::R1); + int FrameIndex = MI.getOperand(i).getFrameIndex(); -// // Take into account whether it's an add or mem instruction -// unsigned OffIdx = (i == 2) ? 1 : 2; + // Add the base register of R30 (SP) or R15 (FP). + MI.SetMachineOperandReg(i + 1, hasFP(MF) ? Alpha::R15 : Alpha::R30); + + // Now add the frame object offset to the offset from r1. + int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex); -// // Now add the frame object offset to the offset from r1. -// int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) + -// MI.getOperand(OffIdx).getImmedValue(); + // If we're not using a Frame Pointer that has been set to the value of the + // SP before having the stack size subtracted from it, then add the stack size + // to Offset to get the correct offset. + Offset += MF.getFrameInfo()->getStackSize(); -// // If we're not using a Frame Pointer that has been set to the value of the -// // SP before having the stack size subtracted from it, then add the stack size -// // to Offset to get the correct offset. -// Offset += MF.getFrameInfo()->getStackSize(); - -// if (Offset > 32767 || Offset < -32768) { -// // Insert a set of r0 with the full offset value before the ld, st, or add -// MachineBasicBlock *MBB = MI.getParent(); -// MBB->insert(II, BuildMI(PPC::LIS, 1, PPC::R0).addSImm(Offset >> 16)); -// MBB->insert(II, BuildMI(PPC::ORI, 2, PPC::R0).addReg(PPC::R0) -// .addImm(Offset)); -// // convert into indexed form of the instruction -// // sth 0:rA, 1:imm 2:(rB) ==> sthx 0:rA, 2:rB, 1:r0 -// // addi 0:rA 1:rB, 2, imm ==> add 0:rA, 1:rB, 2:r0 -// unsigned NewOpcode = -// const_cast<std::map<unsigned, unsigned>& >(ImmToIdxMap)[MI.getOpcode()]; -// assert(NewOpcode && "No indexed form of load or store available!"); -// MI.setOpcode(NewOpcode); -// MI.SetMachineOperandReg(1, MI.getOperand(i).getReg()); -// MI.SetMachineOperandReg(2, PPC::R0); -// } else { -// MI.SetMachineOperandConst(OffIdx, MachineOperand::MO_SignExtendedImmed, -// Offset); -// } + if (Offset > 32767 || Offset < -32768) { + std::cerr << "Offset needs to be " << Offset << "\n"; + assert(0 && "stack too big"); + } else { + MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed, Offset); + } } @@ -191,6 +173,14 @@ void AlphaRegisterInfo::emitPrologue(MachineFunction &MF) const { // Get the number of bytes to allocate from the FrameInfo unsigned NumBytes = MFI->getStackSize(); + if (MFI->hasCalls()) { + // We reserve argument space for call sites in the function immediately on + // entry to the current function. This eliminates the need for add/sub + // brackets around call sites. + NumBytes += MFI->getMaxCallFrameSize(); + std::cerr << "Added " << MFI->getMaxCallFrameSize() << " to the stack due to calls\n"; + } + // Do we need to allocate space on the stack? if (NumBytes == 0) return; |