diff options
| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-01-26 21:54:09 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-01-26 21:54:09 +0000 |
| commit | 3e98fde96bfeb346fb32bc1be3d667da66436592 (patch) | |
| tree | 91c554cb17db92ee64d8ff3879365646c2076e3c /lib/Target/Alpha/AlphaRegisterInfo.cpp | |
| parent | 9b5cb04a0a784ff35de93d07341b6616a15110d0 (diff) | |
initial fp support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19847 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Alpha/AlphaRegisterInfo.cpp')
| -rw-r--r-- | lib/Target/Alpha/AlphaRegisterInfo.cpp | 31 |
1 files changed, 19 insertions, 12 deletions
diff --git a/lib/Target/Alpha/AlphaRegisterInfo.cpp b/lib/Target/Alpha/AlphaRegisterInfo.cpp index 807193a387..0c5ca35202 100644 --- a/lib/Target/Alpha/AlphaRegisterInfo.cpp +++ b/lib/Target/Alpha/AlphaRegisterInfo.cpp @@ -48,7 +48,7 @@ void AlphaRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, int FrameIdx) const { - std::cerr << "Trying to store " << getPrettyName(SrcReg) << " to " << FrameIdx << "\n"; + //std::cerr << "Trying to store " << getPrettyName(SrcReg) << " to " << FrameIdx << "\n"; //BuildMI(MBB, MI, Alpha::WTF, 0).addReg(SrcReg); BuildMI(MBB, MI, Alpha::STQ, 3).addReg(SrcReg).addImm(FrameIdx * 8).addReg(Alpha::R30); // assert(0 && "TODO"); @@ -58,7 +58,7 @@ void AlphaRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIdx) const{ - std::cerr << "Trying to load " << getPrettyName(DestReg) << " to " << FrameIdx << "\n"; + //std::cerr << "Trying to load " << getPrettyName(DestReg) << " to " << FrameIdx << "\n"; //BuildMI(MBB, MI, Alpha::WTF, 0, DestReg); BuildMI(MBB, MI, Alpha::LDQ, 2, DestReg).addImm(FrameIdx * 8).addReg(Alpha::R30); // assert(0 && "TODO"); @@ -71,8 +71,8 @@ void AlphaRegisterInfo::copyRegToReg(MachineBasicBlock &MBB, // std::cerr << "copyRegToReg " << DestReg << " <- " << SrcReg << "\n"; if (RC == Alpha::GPRCRegisterClass) { BuildMI(MBB, MI, Alpha::BIS, 2, DestReg).addReg(SrcReg).addReg(SrcReg); -// } else if (RC == Alpha::FPRCRegisterClass) { -// BuildMI(MBB, MI, PPC::FMR, 1, DestReg).addReg(SrcReg); + } else if (RC == Alpha::FPRCRegisterClass) { + BuildMI(MBB, MI, Alpha::CPYS, 2, DestReg).addReg(SrcReg).addReg(SrcReg); } else { std::cerr << "Attempt to copy register that is not GPR or FPR"; abort(); @@ -205,14 +205,21 @@ void AlphaRegisterInfo::emitPrologue(MachineFunction &MF) const { // adjust stack pointer: r30 -= numbytes - if (NumBytes <= 32000) //FIXME: do this better - { - MI=BuildMI(Alpha::LDA, 2, Alpha::R30).addImm(-NumBytes).addReg(Alpha::R30); - MBB.insert(MBBI, MI); - } else { - std::cerr << "Too big a stack frame\n"; - abort(); - } + if (NumBytes <= 32767) { + MI=BuildMI(Alpha::LDA, 2, Alpha::R30).addImm(-NumBytes).addReg(Alpha::R30); + MBB.insert(MBBI, MI); + } else if (NumBytes <= 32767 * 65536) { + long y = NumBytes / 65536; + if (NumBytes % 65536 > 32767) + ++y; + MI=BuildMI(Alpha::LDAH, 2, Alpha::R30).addImm(-y).addReg(Alpha::R30); + MBB.insert(MBBI, MI); + MI=BuildMI(Alpha::LDA, 2, Alpha::R30).addImm(-(NumBytes - y * 65536)).addReg(Alpha::R30); + MBB.insert(MBBI, MI); + } else { + std::cerr << "Too big a stack frame\n"; + abort(); + } } void AlphaRegisterInfo::emitEpilogue(MachineFunction &MF, |