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| author | Jim Grosbach <grosbach@apple.com> | 2009-10-28 17:33:28 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2009-10-28 17:33:28 +0000 |
| commit | ca5dfb71ba4aa4a8392a021ec056cf0b70f74f1e (patch) | |
| tree | f23b492a84c740aa8bc1b019a83a39ebbd1197ab /lib/Target/ARM/Thumb2RegisterInfo.cpp | |
| parent | cd0fee86deaa91bfd3f321d5d3fa695fab7e663e (diff) | |
Cleanup now that frame index scavenging via post-pass is working for ARM and Thumb2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85406 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Thumb2RegisterInfo.cpp')
| -rw-r--r-- | lib/Target/ARM/Thumb2RegisterInfo.cpp | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/lib/Target/ARM/Thumb2RegisterInfo.cpp b/lib/Target/ARM/Thumb2RegisterInfo.cpp index 76b7298567..f24d3e256f 100644 --- a/lib/Target/ARM/Thumb2RegisterInfo.cpp +++ b/lib/Target/ARM/Thumb2RegisterInfo.cpp @@ -60,8 +60,3 @@ void Thumb2RegisterInfo::emitLoadConstPool(MachineBasicBlock &MBB, .addReg(DestReg, getDefRegState(true), SubIdx) .addConstantPoolIndex(Idx).addImm((int64_t)ARMCC::AL).addReg(0); } - -bool Thumb2RegisterInfo:: -requiresRegisterScavenging(const MachineFunction &MF) const { - return true; -} |