diff options
| author | Johnny Chen <johnny.chen@apple.com> | 2010-04-19 17:16:40 +0000 |
|---|---|---|
| committer | Johnny Chen <johnny.chen@apple.com> | 2010-04-19 17:16:40 +0000 |
| commit | d6cc53cfe4ac1978e591d14867b39744463356c0 (patch) | |
| tree | d6a4b63a78e0dfb274f535887613ea072204493f /lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h | |
| parent | 17192a1dd800808e4d7541a41d673d45fcdbe882 (diff) | |
Better error-handling for DisassembleThumb2DPSoReg() where the 3-reg operand
instructions should have Rd (Inst{11-8}) != 0b1111.
Ref: A6.3 32-bit Thumb instruction encoding
A6.3.11 Data-processing (shifted register)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101788 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h')
| -rw-r--r-- | lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h b/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h index 3a6a3926f2..001d0c6dff 100644 --- a/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h +++ b/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h @@ -1340,12 +1340,15 @@ static bool DisassembleThumb2DPSoReg(MCInst &MI, unsigned Opcode, uint32_t insn, if ((Idx = TID.getOperandConstraint(OpIdx, TOI::TIED_TO)) != -1) { // Process tied_to operand constraint. MI.addOperand(MI.getOperand(Idx)); - } else { - assert(!NoDstReg && "Internal error"); + ++OpIdx; + } else if (!NoDstReg) { MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID, decodeRn(insn)))); + ++OpIdx; + } else { + DEBUG(errs() << "Thumb encoding error: d==15 for three-reg operands.\n"); + return false; } - ++OpIdx; } MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID, |