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| author | Andrew Trick <atrick@apple.com> | 2011-04-07 19:54:57 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2011-04-07 19:54:57 +0000 |
| commit | 54699765064842fd08d1466adc93453660bc2a85 (patch) | |
| tree | 7b7dd1f577848063e5f0a0beb05f633edbe7705e /lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp | |
| parent | 9777e7afd4a9a348f043e914192d491b620659f1 (diff) | |
Added a check in the preRA scheduler for potential interference on a
induction variable. The preRA scheduler is unaware of induction vars,
so we look for potential "virtual register cycles" instead.
Fixes <rdar://problem/8946719> Bad scheduling prevents coalescing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129100 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp')
0 files changed, 0 insertions, 0 deletions