More bits of the ARM target assembler for llvm-mc to parse immediates.

Also fixed a couple of coding style things that crept in.  And added more
to the temporary hacked up ARMAsmParser::MatchInstruction() method for testing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84040 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 28 insertions, 4 deletions

diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 849c9b6b24..c82ab583ef 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -92,6 +92,7 @@ struct ARMOperand {
   enum {
     Token,
     Register,
+    Immediate,
     Memory
   } Kind;
 
@@ -107,6 +108,10 @@ struct ARMOperand {
       bool Writeback;
     } Reg;
 
+    struct {
+      const MCExpr *Val;
+    } Imm;
+
     // This is for all forms of ARM address expressions
     struct {
       unsigned BaseRegNum;
@@ -134,6 +139,11 @@ struct ARMOperand {
     return Reg.RegNum;
   }
 
+  const MCExpr *getImm() const {
+    assert(Kind == Immediate && "Invalid access!");
+    return Imm.Val;
+  }
+
   bool isToken() const {return Kind == Token; }
 
   bool isReg() const { return Kind == Register; }
@@ -159,6 +169,13 @@ struct ARMOperand {
     return Res;
   }
 
+  static ARMOperand CreateImm(const MCExpr *Val) {
+    ARMOperand Res;
+    Res.Kind = Immediate;
+    Res.Imm.Val = Val;
+    return Res;
+  }
+
   static ARMOperand CreateMem(unsigned BaseRegNum, bool OffsetIsReg,
                               const MCExpr *Offset, unsigned OffsetRegNum,
                               bool OffsetRegShifted, enum ShiftType ShiftType,
@@ -217,7 +234,7 @@ bool ARMAsmParser::ParseRegister(ARMOperand &Op) {
 // for now.
 bool ARMAsmParser::ParseRegisterList(ARMOperand &Op) {
   assert(getLexer().getTok().is(AsmToken::LCurly) &&
-	 "Token is not an Left Curly Brace");
+         "Token is not an Left Curly Brace");
   getLexer().Lex(); // Eat left curly brace token.
 
   const AsmToken &RegTok = getLexer().getTok();
@@ -498,7 +515,8 @@ bool ARMAsmParser::MatchInstruction(SmallVectorImpl<ARMOperand> &Operands,
       Mnemonic == "str" ||
       Mnemonic == "ldmfd" ||
       Mnemonic == "ldr" ||
-      Mnemonic == "mov")
+      Mnemonic == "mov" ||
+      Mnemonic == "sub")
     return false;
 
   return true;
@@ -517,9 +535,15 @@ bool ARMAsmParser::ParseOperand(ARMOperand &Op) {
       return false;
   case AsmToken::LCurly:
     if (!ParseRegisterList(Op))
-      return(false);
+      return false;
   case AsmToken::Hash:
-    return Error(getLexer().getTok().getLoc(), "immediates not yet supported");
+    // $42 -> immediate.
+    getLexer().Lex();
+    const MCExpr *Val;
+    if (getParser().ParseExpression(Val))
+      return true;
+    Op = ARMOperand::CreateImm(Val);
+    return false;
   default:
     return Error(getLexer().getTok().getLoc(), "unexpected token in operand");
   }