diff options
| author | Owen Anderson <resistor@mac.com> | 2011-07-27 23:36:57 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-07-27 23:36:57 +0000 |
| commit | 7b2958392c2be221ff1f0d2ffd45d453dec515dd (patch) | |
| tree | c3de2e59d6137fde1b786fd3007f53bd6ddebb93 /lib/Target/ARM/AsmParser/ARMAsmParser.cpp | |
| parent | 5de728cfe1a922ac9b13546dca94526b2fa693b6 (diff) | |
Refactor and improve the encodings/decodings for addrmode3 loads, and make the writeback operand always the first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136295 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/AsmParser/ARMAsmParser.cpp')
| -rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index bbeec1cac4..fd19d671d9 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -1919,11 +1919,9 @@ cvtStWriteBackRegAddrMode2(MCInst &Inst, unsigned Opcode, bool ARMAsmParser:: cvtLdWriteBackRegAddrMode3(MCInst &Inst, unsigned Opcode, const SmallVectorImpl<MCParsedAsmOperand*> &Operands) { - ((ARMOperand*)Operands[2])->addRegOperands(Inst, 1); - // Create a writeback register dummy placeholder. Inst.addOperand(MCOperand::CreateImm(0)); - + ((ARMOperand*)Operands[2])->addRegOperands(Inst, 1); ((ARMOperand*)Operands[3])->addMemMode3Operands(Inst, 3); ((ARMOperand*)Operands[1])->addCondCodeOperands(Inst, 2); return true; |