diff options
| author | Owen Anderson <resistor@mac.com> | 2011-09-09 21:48:23 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-09-09 21:48:23 +0000 |
| commit | 51f6a7abf27fc92c3d8904c2334feab8b498e8e9 (patch) | |
| tree | 347cda8908f8718adcefca3bd2fd9aa84d605fe1 /lib/Target/ARM/AsmParser/ARMAsmParser.cpp | |
| parent | 13d8baa3fc1aa7dd9d887908838391fa5538e9bd (diff) | |
Thumb unconditional branches are allowed in IT blocks, and therefore should have a predicate operand, unlike conditional branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139415 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/AsmParser/ARMAsmParser.cpp')
| -rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 882c4fe3d2..44488cbb08 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -3567,8 +3567,8 @@ validateInstruction(MCInst &Inst, // Check for non-'al' condition codes outside of the IT block. } else if (isThumbTwo() && MCID.isPredicable() && Inst.getOperand(MCID.findFirstPredOperandIdx()).getImm() != - ARMCC::AL && Inst.getOpcode() != ARM::tBcc && - Inst.getOpcode() != ARM::t2Bcc) + ARMCC::AL && Inst.getOpcode() != ARM::tB && + Inst.getOpcode() != ARM::t2B) return Error(Loc, "predicated instructions must be in IT block"); switch (Inst.getOpcode()) { @@ -3721,6 +3721,16 @@ processInstruction(MCInst &Inst, if (Inst.getOperand(3).getImm() < 8 && Operands.size() == 6) Inst.setOpcode(ARM::tADDi3); break; + case ARM::tB: + // A Thumb conditional branch outside of an IT block is a tBcc. + if (Inst.getOperand(1).getImm() != ARMCC::AL && !inITBlock()) + Inst.setOpcode(ARM::tBcc); + break; + case ARM::t2B: + // A Thumb2 conditional branch outside of an IT block is a t2Bcc. + if (Inst.getOperand(1).getImm() != ARMCC::AL && !inITBlock()) + Inst.setOpcode(ARM::t2Bcc); + break; case ARM::t2Bcc: // If the conditional is AL or we're in an IT block, we really want t2B. if (Inst.getOperand(1).getImm() == ARMCC::AL || inITBlock()) |