diff options
author | Bill Wendling <isanbard@gmail.com> | 2012-05-01 08:27:43 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2012-05-01 08:27:43 +0000 |
commit | 7c4ce30ea6a9d0410f306e805403dd224c3df65c (patch) | |
tree | a66a2957e7618e50dea4bf61484fc4efa03a9a08 /lib/Target/ARM/ARMTargetMachine.cpp | |
parent | c80e7d2ea46589c5e42e09081a079392f6fbf041 (diff) |
Change the PassManager from a reference to a pointer.
The TargetPassManager's default constructor wants to initialize the PassManager
to 'null'. But it's illegal to bind a null reference to a null l-value. Make the
ivar a pointer instead.
PR12468
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155902 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMTargetMachine.cpp')
-rw-r--r-- | lib/Target/ARM/ARMTargetMachine.cpp | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp index 047efc23a4..9aa8308920 100644 --- a/lib/Target/ARM/ARMTargetMachine.cpp +++ b/lib/Target/ARM/ARMTargetMachine.cpp @@ -136,22 +136,22 @@ TargetPassConfig *ARMBaseTargetMachine::createPassConfig(PassManagerBase &PM) { bool ARMPassConfig::addPreISel() { if (TM->getOptLevel() != CodeGenOpt::None && EnableGlobalMerge) - PM.add(createGlobalMergePass(TM->getTargetLowering())); + PM->add(createGlobalMergePass(TM->getTargetLowering())); return false; } bool ARMPassConfig::addInstSelector() { - PM.add(createARMISelDag(getARMTargetMachine(), getOptLevel())); + PM->add(createARMISelDag(getARMTargetMachine(), getOptLevel())); return false; } bool ARMPassConfig::addPreRegAlloc() { // FIXME: temporarily disabling load / store optimization pass for Thumb1. if (getOptLevel() != CodeGenOpt::None && !getARMSubtarget().isThumb1Only()) - PM.add(createARMLoadStoreOptimizationPass(true)); + PM->add(createARMLoadStoreOptimizationPass(true)); if (getOptLevel() != CodeGenOpt::None && getARMSubtarget().isCortexA9()) - PM.add(createMLxExpansionPass()); + PM->add(createMLxExpansionPass()); return true; } @@ -159,23 +159,23 @@ bool ARMPassConfig::addPreSched2() { // FIXME: temporarily disabling load / store optimization pass for Thumb1. if (getOptLevel() != CodeGenOpt::None) { if (!getARMSubtarget().isThumb1Only()) { - PM.add(createARMLoadStoreOptimizationPass()); + PM->add(createARMLoadStoreOptimizationPass()); printAndVerify("After ARM load / store optimizer"); } if (getARMSubtarget().hasNEON()) - PM.add(createExecutionDependencyFixPass(&ARM::DPRRegClass)); + PM->add(createExecutionDependencyFixPass(&ARM::DPRRegClass)); } // Expand some pseudo instructions into multiple instructions to allow // proper scheduling. - PM.add(createARMExpandPseudoPass()); + PM->add(createARMExpandPseudoPass()); if (getOptLevel() != CodeGenOpt::None) { if (!getARMSubtarget().isThumb1Only()) addPass(IfConverterID); } if (getARMSubtarget().isThumb2()) - PM.add(createThumb2ITBlockPass()); + PM->add(createThumb2ITBlockPass()); return true; } @@ -183,13 +183,13 @@ bool ARMPassConfig::addPreSched2() { bool ARMPassConfig::addPreEmitPass() { if (getARMSubtarget().isThumb2()) { if (!getARMSubtarget().prefers32BitThumb()) - PM.add(createThumb2SizeReductionPass()); + PM->add(createThumb2SizeReductionPass()); // Constant island pass work on unbundled instructions. addPass(UnpackMachineBundlesID); } - PM.add(createARMConstantIslandPass()); + PM->add(createARMConstantIslandPass()); return true; } |