add the memri memory operand

this makes it possible for ldr instructions with non-zero immediate


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29103 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 18 insertions, 8 deletions

diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp
index 0c269eede2..e7e1690596 100644
--- a/lib/Target/ARM/ARMRegisterInfo.cpp
+++ b/lib/Target/ARM/ARMRegisterInfo.cpp
@@ -83,23 +83,33 @@ ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
 
   assert (MI.getOpcode() == ARM::ldr);
 
-  unsigned FrameIdx = 1;
+  unsigned FrameIdx = 2;
+  unsigned OffIdx = 1;
 
   int FrameIndex = MI.getOperand(FrameIdx).getFrameIndex();
 
   int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
+  assert (MI.getOperand(OffIdx).getImmedValue() == 0);
 
   unsigned StackSize = MF.getFrameInfo()->getStackSize();
 
   Offset += StackSize;
 
-  // Insert a set of r12 with the full address
-  // r12 = r13 + offset
-  MachineBasicBlock *MBB2 = MI.getParent();
-  BuildMI(*MBB2, II, ARM::addri, 2, ARM::R12).addReg(ARM::R13).addImm(Offset);
-
-  // Replace the FrameIndex with r12
-  MI.getOperand(FrameIdx).ChangeToRegister(ARM::R12);
+  assert (Offset >= 0);
+  if (Offset < 4096) {
+    // Replace the FrameIndex with r13
+    MI.getOperand(FrameIdx).ChangeToRegister(ARM::R13);
+    // Replace the ldr offset with Offset
+    MI.getOperand(OffIdx).ChangeToImmediate(Offset);
+  } else {
+    // Insert a set of r12 with the full address
+    // r12 = r13 + offset
+    MachineBasicBlock *MBB2 = MI.getParent();
+    BuildMI(*MBB2, II, ARM::addri, 2, ARM::R12).addReg(ARM::R13).addImm(Offset);
+
+    // Replace the FrameIndex with r12
+    MI.getOperand(FrameIdx).ChangeToRegister(ARM::R12);
+  }
 }
 
 void ARMRegisterInfo::