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authorEvan Cheng <evan.cheng@apple.com>2007-10-18 21:29:24 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-10-18 21:29:24 +0000
commit58184e6878fdab651bc7c9a59dab2687ca82ede2 (patch)
tree31c7f282b0d132b9b8b6153cf5ed87f3c5221ef5 /lib/Target/ARM/ARMRegisterInfo.cpp
parent99db6add3d3185c06acb1785d6d685f3e680aa0d (diff)
Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43150 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMRegisterInfo.cpp')
-rw-r--r--lib/Target/ARM/ARMRegisterInfo.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp
index 02446e91a9..c448467328 100644
--- a/lib/Target/ARM/ARMRegisterInfo.cpp
+++ b/lib/Target/ARM/ARMRegisterInfo.cpp
@@ -183,9 +183,9 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
}
void ARMRegisterInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
- SmallVector<MachineOperand,4> Addr,
+ SmallVectorImpl<MachineOperand> Addr,
const TargetRegisterClass *RC,
- SmallVector<MachineInstr*, 4> &NewMIs) const {
+ SmallVectorImpl<MachineInstr*> &NewMIs) const {
unsigned Opc = 0;
if (RC == ARM::GPRRegisterClass) {
ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
@@ -239,9 +239,9 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
}
void ARMRegisterInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
- SmallVector<MachineOperand,4> Addr,
+ SmallVectorImpl<MachineOperand> Addr,
const TargetRegisterClass *RC,
- SmallVector<MachineInstr*, 4> &NewMIs) const {
+ SmallVectorImpl<MachineInstr*> &NewMIs) const {
unsigned Opc = 0;
if (RC == ARM::GPRRegisterClass) {
ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();