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authorEvan Cheng <evan.cheng@apple.com>2007-02-06 06:13:29 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-02-06 06:13:29 +0000
commit40984d7449c80a3d0365d31f25dff451fd54f060 (patch)
tree1cff77b847da1dfb2de33684a44fcf2b6afa1cce /lib/Target/ARM/ARMRegisterInfo.cpp
parent7d6f77db284913a1dd4b5f362fd62ba65b76784b (diff)
foldMemoryOperand() cannot fold tMOVrr sp into load / store in thumb mode. tLDRspi / tSTRspi cannot target / store high registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33958 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMRegisterInfo.cpp')
-rw-r--r--lib/Target/ARM/ARMRegisterInfo.cpp32
1 files changed, 19 insertions, 13 deletions
diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp
index ef54124b1b..90fc84ffe5 100644
--- a/lib/Target/ARM/ARMRegisterInfo.cpp
+++ b/lib/Target/ARM/ARMRegisterInfo.cpp
@@ -185,6 +185,19 @@ void ARMRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
abort();
}
+/// isLowRegister - Returns true if the register is low register r0-r7.
+///
+static bool isLowRegister(unsigned Reg) {
+ using namespace ARM;
+ switch (Reg) {
+ case R0: case R1: case R2: case R3:
+ case R4: case R5: case R6: case R7:
+ return true;
+ default:
+ return false;
+ }
+}
+
MachineInstr *ARMRegisterInfo::foldMemoryOperand(MachineInstr *MI,
unsigned OpNum, int FI) const {
unsigned Opc = MI->getOpcode();
@@ -206,10 +219,16 @@ MachineInstr *ARMRegisterInfo::foldMemoryOperand(MachineInstr *MI,
case ARM::tMOVrr: {
if (OpNum == 0) { // move -> store
unsigned SrcReg = MI->getOperand(1).getReg();
+ if (!isLowRegister(SrcReg))
+ // tSTRspi cannot take a high register operand.
+ break;
NewMI = BuildMI(TII.get(ARM::tSTRspi)).addReg(SrcReg).addFrameIndex(FI)
.addImm(0);
} else { // move -> load
unsigned DstReg = MI->getOperand(0).getReg();
+ if (!isLowRegister(DstReg))
+ // tLDRspi cannot target a high register operand.
+ break;
NewMI = BuildMI(TII.get(ARM::tLDRspi), DstReg).addFrameIndex(FI)
.addImm(0);
}
@@ -316,19 +335,6 @@ void emitARMRegPlusImmediate(MachineBasicBlock &MBB,
}
}
-/// isLowRegister - Returns true if the register is low register r0-r7.
-///
-static bool isLowRegister(unsigned Reg) {
- using namespace ARM;
- switch (Reg) {
- case R0: case R1: case R2: case R3:
- case R4: case R5: case R6: case R7:
- return true;
- default:
- return false;
- }
-}
-
/// calcNumMI - Returns the number of instructions required to materialize
/// the specific add / sub r, c instruction.
static unsigned calcNumMI(int Opc, int ExtraOpc, unsigned Bytes,