diff options
| author | Jim Grosbach <grosbach@apple.com> | 2010-12-03 22:31:40 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-12-03 22:31:40 +0000 |
| commit | d91f4e40e6312304c60c83c3dd93f769a39a9772 (patch) | |
| tree | 003a4711455541613b8e9792f3615a2017771219 /lib/Target/ARM/ARMMCCodeEmitter.cpp | |
| parent | 5812b10adb850337a56d9480c3383abfe1c12f25 (diff) | |
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order
halfword being emitted to the stream first. rdar://8728174
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120848 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMMCCodeEmitter.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMMCCodeEmitter.cpp | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMMCCodeEmitter.cpp b/lib/Target/ARM/ARMMCCodeEmitter.cpp index d6926d9450..bdac5adf4c 100644 --- a/lib/Target/ARM/ARMMCCodeEmitter.cpp +++ b/lib/Target/ARM/ARMMCCodeEmitter.cpp @@ -995,6 +995,7 @@ getAddrMode6OffsetOpValue(const MCInst &MI, unsigned Op, void ARMMCCodeEmitter:: EncodeInstruction(const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups) const { + const ARMSubtarget &Subtarget = TM.getSubtarget<ARMSubtarget>(); // Pseudo instructions don't get encoded. const TargetInstrDesc &Desc = TII.get(MI.getOpcode()); uint64_t TSFlags = Desc.TSFlags; @@ -1007,7 +1008,14 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS, case ARMII::Size2Bytes: Size = 2; break; case ARMII::Size4Bytes: Size = 4; break; } - EmitConstant(getBinaryCodeForInstr(MI, Fixups), Size, OS); + uint32_t Binary = getBinaryCodeForInstr(MI, Fixups); + // Thumb 32-bit wide instructions need to be have the high order halfword + // emitted first. + if (Subtarget.isThumb() && Size == 4) { + EmitConstant(Binary >> 16, 2, OS); + EmitConstant(Binary & 0xffff, 2, OS); + } else + EmitConstant(Binary, Size, OS); ++MCNumEmitted; // Keep track of the # of mi's emitted. } |