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authorEvan Cheng <evan.cheng@apple.com>2009-08-04 08:34:18 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-08-04 08:34:18 +0000
commiteb084d16712ededa4486e1dd05ba98aa3d40646c (patch)
tree61754284b41969b60879a9326ac64ca3690b5afe /lib/Target/ARM/ARMLoadStoreOptimizer.cpp
parentd5ac40457b62f37f0abfb1d61064f7c7300e91ee (diff)
Thumb2 does not have ib (increment before) and da (decrement after) forms of ldm / stm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78057 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMLoadStoreOptimizer.cpp')
-rw-r--r--lib/Target/ARM/ARMLoadStoreOptimizer.cpp14
1 files changed, 10 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
index 87a5aea025..c6afbe9336 100644
--- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -176,13 +176,19 @@ ARMLoadStoreOpt::MergeOps(MachineBasicBlock &MBB,
ARM_AM::AMSubMode Mode = ARM_AM::ia;
bool isAM4 = isi32Load(Opcode) || isi32Store(Opcode);
- if (isAM4 && Offset == 4)
+ if (isAM4 && Offset == 4) {
+ if (isThumb2)
+ // Thumb2 does not support ldmib / stmib.
+ return false;
Mode = ARM_AM::ib;
- else if (isAM4 && Offset == -4 * (int)NumRegs + 4)
+ } else if (isAM4 && Offset == -4 * (int)NumRegs + 4) {
+ if (isThumb2)
+ // Thumb2 does not support ldmda / stmda.
+ return false;
Mode = ARM_AM::da;
- else if (isAM4 && Offset == -4 * (int)NumRegs)
+ } else if (isAM4 && Offset == -4 * (int)NumRegs) {
Mode = ARM_AM::db;
- else if (Offset != 0) {
+ } else if (Offset != 0) {
// If starting offset isn't zero, insert a MI to materialize a new base.
// But only do so if it is cost effective, i.e. merging more than two
// loads / stores.