Switch the MachineOperand accessors back to the short names like

isReg, etc., from isRegister, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 3 insertions, 3 deletions

diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
index 8bd4caa6fd..27fec1fc60 100644
--- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -544,13 +544,13 @@ static bool isMemoryOp(MachineInstr *MI) {
   default: break;
   case ARM::LDR:
   case ARM::STR:
-    return MI->getOperand(1).isRegister() && MI->getOperand(2).getReg() == 0;
+    return MI->getOperand(1).isReg() && MI->getOperand(2).getReg() == 0;
   case ARM::FLDS:
   case ARM::FSTS:
-    return MI->getOperand(1).isRegister();
+    return MI->getOperand(1).isReg();
   case ARM::FLDD:
   case ARM::FSTD:
-    return MI->getOperand(1).isRegister();
+    return MI->getOperand(1).isReg();
   }
   return false;
 }