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authorJim Grosbach <grosbach@apple.com>2009-08-11 15:33:49 +0000
committerJim Grosbach <grosbach@apple.com>2009-08-11 15:33:49 +0000
commit764ab52dd80310a205c9888bf166d09dab858f90 (patch)
tree017cab5bffc639b25c736578c70a19e817592f7d /lib/Target/ARM/ARMLoadStoreOptimizer.cpp
parentf128787f941bb372e80d69b786ed144d8606a292 (diff)
Whitespace cleanup. Remove trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78666 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMLoadStoreOptimizer.cpp')
-rw-r--r--lib/Target/ARM/ARMLoadStoreOptimizer.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
index 3c2bdc756f..11d4887e25 100644
--- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -162,7 +162,7 @@ static bool isi32Store(unsigned Opc) {
/// MergeOps - Create and insert a LDM or STM with Base as base register and
/// registers in Regs as the register operands that would be loaded / stored.
-/// It returns true if the transformation is done.
+/// It returns true if the transformation is done.
bool
ARMLoadStoreOpt::MergeOps(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
@@ -968,7 +968,7 @@ bool ARMLoadStoreOpt::LoadStoreMultipleOpti(MachineBasicBlock &MBB) {
if (MergeBaseUpdateLoadStore(MBB, MemOps[i].MBBI, TII,Advance,MBBI))
++NumMerges;
- // RS may be pointing to an instruction that's deleted.
+ // RS may be pointing to an instruction that's deleted.
RS->skipTo(prior(MBBI));
} else if (NumMemOps == 1) {
// Try folding preceeding/trailing base inc/dec into the single