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| author | Bob Wilson <bob.wilson@apple.com> | 2010-03-13 07:34:35 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-03-13 07:34:35 +0000 |
| commit | bffb5b39bea3288bc557b10f3ed1864e6c7857e0 (patch) | |
| tree | 13c8f4785bc2256b5572479fd15197c1ca390de0 /lib/Target/ARM/ARMInstrInfo.td | |
| parent | 206d61e62f02f5ea5eefdd125dc48ff28f15da4a (diff) | |
Attempt to appease the arm-linux buildbot by fixing the JIT encodings for new
base register updating load/store-multiple instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98427 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrInfo.td')
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index a82a5d1e57..3fc37dae4e 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -908,7 +908,7 @@ let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1, hasExtraDefRegAllocReq = 1 in def LDM_RET : AXI4ld<(outs GPR:$wb), (ins addrmode4:$addr, pred:$p, reglist:$dsts, variable_ops), - LdStMulFrm, IIC_Br, + IndexModeUpd, LdStMulFrm, IIC_Br, "ldm${addr:submode}${p}\t$addr, $dsts", "$addr.addr = $wb", []>; @@ -1347,24 +1347,26 @@ def STRHT: AI3sthpo<(outs GPR:$base_wb), let mayLoad = 1, hasExtraDefRegAllocReq = 1 in { def LDM : AXI4ld<(outs), (ins addrmode4:$addr, pred:$p, - reglist:$dsts, variable_ops), LdStMulFrm, IIC_iLoadm, + reglist:$dsts, variable_ops), + IndexModeNone, LdStMulFrm, IIC_iLoadm, "ldm${addr:submode}${p}\t$addr, $dsts", "", []>; def LDM_UPD : AXI4ld<(outs GPR:$wb), (ins addrmode4:$addr, pred:$p, reglist:$dsts, variable_ops), - LdStMulFrm, IIC_iLoadm, + IndexModeUpd, LdStMulFrm, IIC_iLoadm, "ldm${addr:submode}${p}\t$addr, $dsts", "$addr.addr = $wb", []>; } // mayLoad, hasExtraDefRegAllocReq let mayStore = 1, hasExtraSrcRegAllocReq = 1 in { def STM : AXI4st<(outs), (ins addrmode4:$addr, pred:$p, - reglist:$srcs, variable_ops), LdStMulFrm, IIC_iStorem, + reglist:$srcs, variable_ops), + IndexModeNone, LdStMulFrm, IIC_iStorem, "stm${addr:submode}${p}\t$addr, $srcs", "", []>; def STM_UPD : AXI4st<(outs GPR:$wb), (ins addrmode4:$addr, pred:$p, reglist:$srcs, variable_ops), - LdStMulFrm, IIC_iStorem, + IndexModeUpd, LdStMulFrm, IIC_iStorem, "stm${addr:submode}${p}\t$addr, $srcs", "$addr.addr = $wb", []>; } // mayStore, hasExtraSrcRegAllocReq |