diff options
| author | Bob Wilson <bob.wilson@apple.com> | 2010-03-20 22:13:40 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-03-20 22:13:40 +0000 |
| commit | 226036ee731a2041f37f28f958d2b6a50373f4f4 (patch) | |
| tree | 810462699200a53793f916326b5e6f9726aeaa31 /lib/Target/ARM/ARMInstrInfo.td | |
| parent | d5fadaf56ee1e8ee137d34bed6749bd3b11ffd88 (diff) | |
Re-commit r98683 ("remove redundant writeback flag from ARM address mode 6")
with changes to add a separate optional register update argument. Change all
the NEON instructions with address register writeback to use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99095 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrInfo.td')
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index a70d6dfe81..26a280697b 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -285,7 +285,7 @@ def pclabel : Operand<i32> { // shifter_operand operands: so_reg and so_imm. def so_reg : Operand<i32>, // reg reg imm - ComplexPattern<i32, 3, "SelectShifterOperandReg", + ComplexPattern<i32, 3, "SelectShifterOperandReg", [shl,srl,sra,rotr]> { let PrintMethod = "printSORegOperand"; let MIOperandInfo = (ops GPR, GPR, i32imm); @@ -395,9 +395,14 @@ def addrmode5 : Operand<i32>, // addrmode6 := reg with optional writeback // def addrmode6 : Operand<i32>, - ComplexPattern<i32, 4, "SelectAddrMode6", []> { + ComplexPattern<i32, 2, "SelectAddrMode6", []> { let PrintMethod = "printAddrMode6Operand"; - let MIOperandInfo = (ops GPR:$addr, GPR:$upd, i32imm, i32imm); + let MIOperandInfo = (ops GPR:$addr, i32imm); +} + +def am6offset : Operand<i32> { + let PrintMethod = "printAddrMode6OffsetOperand"; + let MIOperandInfo = (ops GPR); } // addrmodepc := pc + reg |