Revert the earlier change that removed the M_REMATERIALIZABLE machine

instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37728 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 0 insertions, 14 deletions

diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp
index a1e02581cd..1370faba4d 100644
--- a/lib/Target/ARM/ARMInstrInfo.cpp
+++ b/lib/Target/ARM/ARMInstrInfo.cpp
@@ -130,20 +130,6 @@ unsigned ARMInstrInfo::isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) con
   return 0;
 }
 
-bool ARMInstrInfo::isTriviallyReMaterializable(MachineInstr *MI) const {
-  switch (MI->getOpcode()) {
-  default: break;
-  case ARM::LDRcp:
-  case ARM::MOVi:
-  case ARM::MVNi:
-  case ARM::MOVi2pieces:
-  case ARM::tLDRcp:
-    // These instructions are always trivially rematerializable.
-    return true;
-  }
-  return false;
-}
-
 static unsigned getUnindexedOpcode(unsigned Opc) {
   switch (Opc) {
   default: break;