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| author | Chris Lattner <sabre@nondot.org> | 2008-01-07 02:48:55 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2008-01-07 02:48:55 +0000 |
| commit | cc8cd0cbf12c12916d4b38ef0de5be5501c8270e (patch) | |
| tree | 5f6826d4941017ac8ed24e65dfea73d2bdfb3714 /lib/Target/ARM/ARMInstrInfo.cpp | |
| parent | ba6da5d5b72618c836ebc3a7613583a16bc8ceac (diff) | |
remove MachineOpCode typedef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45679 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrInfo.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp index 35226379e1..b291d19d86 100644 --- a/lib/Target/ARM/ARMInstrInfo.cpp +++ b/lib/Target/ARM/ARMInstrInfo.cpp @@ -52,7 +52,7 @@ const TargetRegisterClass *ARMInstrInfo::getPointerRegClass() const { /// bool ARMInstrInfo::isMoveInstr(const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg) const { - MachineOpCode oc = MI.getOpcode(); + unsigned oc = MI.getOpcode(); switch (oc) { default: return false; |