Rewrite of Thumb constant islands handling (exact allowance for padding

around islands and jump tables).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36573 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 4 insertions, 3 deletions

diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp
index a5ab09c993..de3a7fda4d 100644
--- a/lib/Target/ARM/ARMInstrInfo.cpp
+++ b/lib/Target/ARM/ARMInstrInfo.cpp
@@ -469,12 +469,13 @@ unsigned ARM::GetInstSize(MachineInstr *MI) {
       assert(JTI < JT.size());
       // Thumb instructions are 2 byte aligned, but JT entries are 4 byte
       // 4 aligned. The assembler / linker may add 2 byte padding just before
-      // the JT entries. Use + 4 even for tBR_JTr to purposely over-estimate
-      // the size the jumptable.
+      // the JT entries.  The size does not include this padding; the
+      // constant islands pass does separate bookkeeping for it.
       // FIXME: If we know the size of the function is less than (1 << 16) *2
       // bytes, we can use 16-bit entries instead. Then there won't be an
       // alignment issue.
-      return getNumJTEntries(JT, JTI) * 4 + 4;
+      return getNumJTEntries(JT, JTI) * 4 + 
+             (MI->getOpcode()==ARM::tBR_JTr ? 2 : 4);
     }
     default:
       // Otherwise, pseudo-instruction sizes are zero.