diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2008-09-12 22:45:55 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2008-09-12 22:45:55 +0000 |
| commit | 49a9f2958dadbb1fcdc707ec003a61e9ceef8a4e (patch) | |
| tree | 886ca658cd69e065147372508e7271ac034021f8 /lib/Target/ARM/ARMInstrFormats.td | |
| parent | 5f1db7bf31eec999a55845f91778143b8b3e0aec (diff) | |
Addrmode 1 S bit can be dynamically set. Look for CPSR def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56172 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrFormats.td')
| -rw-r--r-- | lib/Target/ARM/ARMInstrFormats.td | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td index d60ba5f607..eae947e481 100644 --- a/lib/Target/ARM/ARMInstrFormats.td +++ b/lib/Target/ARM/ARMInstrFormats.td @@ -218,7 +218,6 @@ class AsI1<bits<4> opcod, dag oops, dag iops, Format f, string opc, string asm, list<dag> pattern> : sI<opcod, oops, iops, AddrMode1, Size4Bytes, IndexModeNone, f, opc, asm, "", pattern> { - let Inst{20} = 1; let Inst{21-24} = opcod; let Inst{26-27} = 0; } @@ -226,7 +225,6 @@ class AXI1<bits<4> opcod, dag oops, dag iops, Format f, string asm, list<dag> pattern> : XI<opcod, oops, iops, AddrMode1, Size4Bytes, IndexModeNone, f, asm, "", pattern> { - let Inst{20} = 1; let Inst{21-24} = opcod; let Inst{26-27} = 0; } |