diff options
| author | Owen Anderson <resistor@mac.com> | 2011-07-21 18:54:16 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-07-21 18:54:16 +0000 |
| commit | 92a202213bb4c20301abf6ab64e46df3695e60bf (patch) | |
| tree | ea32134f1f818aa4c39815bf26129c890bff42e9 /lib/Target/ARM/ARMISelLowering.cpp | |
| parent | a305fe75450348677a228f7d0f1cc53b2504b562 (diff) | |
Split up the ARM so_reg ComplexPattern into so_reg_reg and so_reg_imm, allowing us to distinguish the encodings that use shifted registers from those that use shifted immediates. This is necessary to allow the fixed-length decoder to distinguish things like BICS vs LDRH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135693 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMISelLowering.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 129b1bcd00..2a7b058715 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -5224,15 +5224,19 @@ struct AddSubFlagsOpcodePair { static AddSubFlagsOpcodePair AddSubFlagsOpcodeMap[] = { {ARM::ADCSri, ARM::ADCri}, {ARM::ADCSrr, ARM::ADCrr}, - {ARM::ADCSrs, ARM::ADCrs}, + {ARM::ADCSrsi, ARM::ADCrsi}, + {ARM::ADCSrsr, ARM::ADCrsr}, {ARM::SBCSri, ARM::SBCri}, {ARM::SBCSrr, ARM::SBCrr}, - {ARM::SBCSrs, ARM::SBCrs}, + {ARM::SBCSrsi, ARM::SBCrsi}, + {ARM::SBCSrsr, ARM::SBCrsr}, {ARM::RSBSri, ARM::RSBri}, {ARM::RSBSrr, ARM::RSBrr}, - {ARM::RSBSrs, ARM::RSBrs}, + {ARM::RSBSrsi, ARM::RSBrsi}, + {ARM::RSBSrsr, ARM::RSBrsr}, {ARM::RSCSri, ARM::RSCri}, - {ARM::RSCSrs, ARM::RSCrs}, + {ARM::RSCSrsi, ARM::RSCrsi}, + {ARM::RSCSrsr, ARM::RSCrsr}, {ARM::t2ADCSri, ARM::t2ADCri}, {ARM::t2ADCSrr, ARM::t2ADCrr}, {ARM::t2ADCSrs, ARM::t2ADCrs}, |