diff options
| author | Lang Hames <lhames@gmail.com> | 2011-11-08 18:56:23 +0000 |
|---|---|---|
| committer | Lang Hames <lhames@gmail.com> | 2011-11-08 18:56:23 +0000 |
| commit | 5207bf2177e9ef1e68d9408ea4b44f1c8a5ef9c0 (patch) | |
| tree | c94405cc8244718db4821d7662e9479180b3d0ed /lib/Target/ARM/ARMISelLowering.cpp | |
| parent | d752e0f7e64585839cb3a458ef52456eaebbea3c (diff) | |
Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported.
Add support for trimming constants to GetDemandedBits. This fixes some funky
constant generation that occurs when stores are expanded for targets that don't
support unaligned stores natively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144102 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMISelLowering.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 84a34d587b..c51e7ae535 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -8171,6 +8171,13 @@ EVT ARMTargetLowering::getOptimalMemOpType(uint64_t Size, } } + // Lowering to i32/i16 if the size permits. + if (Size >= 4) { + return MVT::i32; + } else if (Size >= 2) { + return MVT::i16; + } + // Let the target-independent logic figure it out. return MVT::Other; } |
