diff options
author | Chad Rosier <mcrosier@apple.com> | 2012-05-11 18:51:55 +0000 |
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committer | Chad Rosier <mcrosier@apple.com> | 2012-05-11 18:51:55 +0000 |
commit | 2a2e9d54e95f01eaa5626dcdf57950e9e6f95f2c (patch) | |
tree | fc4f5ba882e3a01d46eafed8b3218f59922033ce /lib/Target/ARM/ARMFastISel.cpp | |
parent | 12c807873a5988d900c8032e7d98f8f07da5c628 (diff) |
[fast-isel] Cleaner fix for when we're unable to handle a non-double multi-reg
retval. Hoists check before emitting the call to avoid unnecessary work.
rdar://11430407
PR12796
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156628 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMFastISel.cpp')
-rw-r--r-- | lib/Target/ARM/ARMFastISel.cpp | 25 |
1 files changed, 21 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index f49a5d3f83..02bb5f41fe 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -2014,7 +2014,8 @@ bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs, // Finally update the result. UpdateValueMap(I, ResultReg); - } else if (RVLocs.size() == 1) { + } else { + assert(RVLocs.size() == 1 &&"Can't handle non-double multi-reg retvals!"); EVT CopyVT = RVLocs[0].getValVT(); // Special handling for extended integers. @@ -2030,9 +2031,6 @@ bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs, // Finally update the result. UpdateValueMap(I, ResultReg); - } else { - // Can't handle non-double multi-reg retvals. - return false; } } @@ -2144,6 +2142,15 @@ bool ARMFastISel::ARMEmitLibcall(const Instruction *I, RTLIB::Libcall Call) { // TODO: For now if we have long calls specified we don't handle the call. if (EnableARMLongCalls) return false; + // Can't handle non-double multi-reg retvals. + if (RetVT != MVT::isVoid && RetVT != MVT::i32) { + SmallVector<CCValAssign, 16> RVLocs; + CCState CCInfo(CC, false, *FuncInfo.MF, TM, RVLocs, *Context); + CCInfo.AnalyzeCallResult(RetVT, CCAssignFnForCall(CC, true)); + if (RVLocs.size() >= 2 && RetVT != MVT::f64) + return false; + } + // Set up the argument vectors. SmallVector<Value*, 8> Args; SmallVector<unsigned, 8> ArgRegs; @@ -2247,6 +2254,16 @@ bool ARMFastISel::SelectCall(const Instruction *I, // TODO: For now if we have long calls specified we don't handle the call. if (EnableARMLongCalls) return false; + // Can't handle non-double multi-reg retvals. + if (RetVT != MVT::isVoid && RetVT != MVT::i1 && RetVT != MVT::i8 && + RetVT != MVT::i16 && RetVT != MVT::i32) { + SmallVector<CCValAssign, 16> RVLocs; + CCState CCInfo(CC, false, *FuncInfo.MF, TM, RVLocs, *Context); + CCInfo.AnalyzeCallResult(RetVT, CCAssignFnForCall(CC, true)); + if (RVLocs.size() >= 2 && RetVT != MVT::f64) + return false; + } + // Set up the argument vectors. SmallVector<Value*, 8> Args; SmallVector<unsigned, 8> ArgRegs; |