diff options
author | Evan Cheng <evan.cheng@apple.com> | 2011-04-19 00:04:03 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2011-04-19 00:04:03 +0000 |
commit | b58a340fa2affa0da27a46c94dd49ba079c9343c (patch) | |
tree | e52d498496e7fca2b0f6a6508e1dd7b943b6b4d8 /lib/Target/ARM/ARMExpandPseudoInsts.cpp | |
parent | 05a5ff1f00c30a68a151342bf7c47bf86d555d57 (diff) |
Do not lose mem_operands while lowering VLD / VST intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129738 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMExpandPseudoInsts.cpp')
-rw-r--r-- | lib/Target/ARM/ARMExpandPseudoInsts.cpp | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/lib/Target/ARM/ARMExpandPseudoInsts.cpp index a14c9526fc..8a6bc5099e 100644 --- a/lib/Target/ARM/ARMExpandPseudoInsts.cpp +++ b/lib/Target/ARM/ARMExpandPseudoInsts.cpp @@ -455,6 +455,10 @@ void ARMExpandPseudo::ExpandVLD(MachineBasicBlock::iterator &MBBI) { // Add an implicit def for the super-register. MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); TransferImpOps(MI, MIB, MIB); + + // Transfer memoperands. + (*MIB).setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); + MI.eraseFromParent(); } @@ -500,6 +504,10 @@ void ARMExpandPseudo::ExpandVST(MachineBasicBlock::iterator &MBBI) { // Add an implicit kill for the super-reg. (*MIB).addRegisterKilled(SrcReg, TRI, true); TransferImpOps(MI, MIB, MIB); + + // Transfer memoperands. + (*MIB).setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); + MI.eraseFromParent(); } |