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| author | Jim Grosbach <grosbach@apple.com> | 2010-10-13 19:56:10 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-10-13 19:56:10 +0000 |
| commit | b35ad41fef5d1edd9495f708fb7eae1a0a94ef9d (patch) | |
| tree | 8d089cf4102930124cb74fb4fa58955d0013d78d /lib/Target/ARM/ARMCodeEmitter.cpp | |
| parent | e822f9450992774a2058163d0572538375e74051 (diff) | |
Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116421 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMCodeEmitter.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMCodeEmitter.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp index d49a79d7f9..b86c8c902e 100644 --- a/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/lib/Target/ARM/ARMCodeEmitter.cpp @@ -170,6 +170,8 @@ namespace { const { return 0; } unsigned getSORegOpValue(const MachineInstr &MI, unsigned Op) const { return 0; } + unsigned getRotImmOpValue(const MachineInstr &MI, unsigned Op) + const { return 0; } /// getMovi32Value - Return binary encoding of operand for movw/movt. If the /// machine operand requires relocation, record the relocation and return |