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authorEvan Cheng <evan.cheng@apple.com>2008-09-17 07:53:38 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-09-17 07:53:38 +0000
commit7fd7ca4e7f775a75f648f03d956c3068c71b991d (patch)
treea802d87298d589130424a4e78ce5cdf6d675720e /lib/Target/ARM/ARMCodeEmitter.cpp
parent29c57c34efcb6b8ba64e3279cdb68937c113552a (diff)
Fix addrmode1 instruction encodings; fix bx_ret encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56277 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMCodeEmitter.cpp')
-rw-r--r--lib/Target/ARM/ARMCodeEmitter.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp
index cd79722ddc..e97548e38d 100644
--- a/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -260,8 +260,8 @@ unsigned ARMCodeEmitter::getAddrModeNoneInstrBinary(const MachineInstr &MI,
break;
}
case ARMII::BranchMisc: {
- // Set bit[19:8] to 0xFFF
- Binary |= 0xfff << 8;
+ if (TID.Opcode == ARM::BX)
+ abort(); // FIXME
if (TID.Opcode == ARM::BX_RET)
Binary |= 0xe; // the return register is LR
else