diff options
| author | Alkis Evlogimenos <alkis@evlogimenos.com> | 2004-02-02 21:56:40 +0000 |
|---|---|---|
| committer | Alkis Evlogimenos <alkis@evlogimenos.com> | 2004-02-02 21:56:40 +0000 |
| commit | eea81bafd624c36d396a08bea87bafd996e6bf43 (patch) | |
| tree | 69327359e1606d1198e28bce5b15eafff4b0bc2d /lib/CodeGen | |
| parent | 782ce955b2553305d9958a17d6482fe87243303d (diff) | |
Correctly update def/use information for modified machine operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11087 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
| -rw-r--r-- | lib/CodeGen/TwoAddressInstructionPass.cpp | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp index 991be42e53..ecd22abe31 100644 --- a/lib/CodeGen/TwoAddressInstructionPass.cpp +++ b/lib/CodeGen/TwoAddressInstructionPass.cpp @@ -146,11 +146,17 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { LV.addVirtualRegisterDead(regB, &*mbbi, prevMi); // replace all occurences of regB with regA + // and mark all uses and defs of regA as def&use for (unsigned i = 1; i < mi->getNumOperands(); ++i) { - if (mi->getOperand(i).isRegister() && - mi->getOperand(i).getReg() == regB) - mi->SetMachineOperandReg(i, regA); + MachineOperand& op = mi->getOperand(i); + if (op.isRegister()) { + if (op.getReg() == regB) + mi->SetMachineOperandReg(i, regA); + if (op.getReg() == regA) + op.setDef().setUse(); + } } + DEBUG(std::cerr << "\t\tmodified original to: "; mi->print(std::cerr, TM)); assert(mi->getOperand(0).getAllocatedRegNum() == |