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| author | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-11-05 03:56:02 +0000 |
|---|---|---|
| committer | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-11-05 03:56:02 +0000 |
| commit | df1c3b8398d1df253ebd389ac1068ec732a2f28f (patch) | |
| tree | 08f1c0ee9c0a8ab550605835168005ba01ffa2d4 /lib/CodeGen | |
| parent | 0b12f2bb30757b92175b81d6099fe98f7579f2a8 (diff) | |
Make reg. numbers signed ints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1137 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
| -rw-r--r-- | lib/CodeGen/MachineInstr.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp index b4f275db38..b620fa4bfa 100644 --- a/lib/CodeGen/MachineInstr.cpp +++ b/lib/CodeGen/MachineInstr.cpp @@ -66,7 +66,7 @@ MachineInstr::SetMachineOperand(unsigned int i, void MachineInstr::SetMachineOperand(unsigned int i, - unsigned int regNum, bool isdef=false) + int regNum, bool isdef=false) { assert(i < operands.size()); operands[i].InitializeReg(regNum); |