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authorLang Hames <lhames@gmail.com>2012-04-02 19:58:43 +0000
committerLang Hames <lhames@gmail.com>2012-04-02 19:58:43 +0000
commitbe9fe49b179a89a659fe786d64b176d2b360bb4a (patch)
treeb3570318e953c06b4e63fb2dc2fb5e52aa80e9ae /lib/CodeGen
parentce167840b2408e531fb7616627ff1bf769b4a111 (diff)
During two-address lowering, rescheduling an instruction does not untie
operands. Make TryInstructionTransform return false to reflect this. Fixes PR11861. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153892 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r--lib/CodeGen/TwoAddressInstructionPass.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp
index 24b8bc2048..789617ba7f 100644
--- a/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -1248,7 +1248,7 @@ TryInstructionTransform(MachineBasicBlock::iterator &mi,
// re-schedule this MI below it.
if (RescheduleMIBelowKill(mbbi, mi, nmi, regB)) {
++NumReSchedDowns;
- return true;
+ return false;
}
if (TargetRegisterInfo::isVirtualRegister(regA))
@@ -1270,7 +1270,7 @@ TryInstructionTransform(MachineBasicBlock::iterator &mi,
// re-schedule it before this MI if it's legal.
if (RescheduleKillAboveMI(mbbi, mi, nmi, regB)) {
++NumReSchedUps;
- return true;
+ return false;
}
// If this is an instruction with a load folded into it, try unfolding