diff options
author | Lang Hames <lhames@gmail.com> | 2012-02-17 00:18:18 +0000 |
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committer | Lang Hames <lhames@gmail.com> | 2012-02-17 00:18:18 +0000 |
commit | af8b34dae90fd6d146a3b4a83b50751ed21f07c8 (patch) | |
tree | 767f4a08638e5de7f2194cfbebc654507efa6184 /lib/CodeGen | |
parent | 178d87079534f12e550642e37a194708511f8b06 (diff) |
Turn off assertion, conservatively compute liveness for live-in un-allocatable registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150768 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r-- | lib/CodeGen/LiveIntervalAnalysis.cpp | 18 |
1 files changed, 10 insertions, 8 deletions
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index 0bf47322ba..2fce006787 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -360,7 +360,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb, } #ifndef NDEBUG -static bool isRegLiveOutOf(const MachineBasicBlock *MBB, unsigned Reg) { +static bool isRegLiveIntoSuccessor(const MachineBasicBlock *MBB, unsigned Reg) { for (MachineBasicBlock::const_succ_iterator SI = MBB->succ_begin(), SE = MBB->succ_end(); SI != SE; ++SI) { @@ -439,7 +439,8 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB, } else { // Unreserved, unallocable registers like EFLAGS can be live across basic // block boundaries. - assert(isRegLiveOutOf(MBB, interval.reg) && "Unreserved reg not live-out?"); + assert(isRegLiveIntoSuccessor(MBB, interval.reg) && + "Unreserved reg not live-out?"); end = getMBBEndIdx(MBB); } exit: @@ -526,15 +527,16 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB, // Live-in register might not be used at all. if (!SeenDefUse) { - if (isAllocatable(interval.reg) || isReserved(interval.reg)) { - // This must be an entry block or landing pad - we asserted so on entry - // to the function. For these blocks the interval is dead on entry, so - // we won't emit a live-range for it. + if (isAllocatable(interval.reg) || + !isRegLiveIntoSuccessor(MBB, interval.reg)) { + // Allocatable registers are never live through. + // Non-allocatable registers that aren't live into any successors also + // aren't live through. DEBUG(dbgs() << " dead"); return; } else { - assert(isRegLiveOutOf(MBB, interval.reg) && - "Live in reg untouched in block should be be live through."); + // If we get here the register is non-allocatable and live into some + // successor. We'll conservatively assume it's live-through. DEBUG(dbgs() << " live through"); end = getMBBEndIdx(MBB); } |