diff options
author | Lang Hames <lhames@gmail.com> | 2010-09-25 12:04:16 +0000 |
---|---|---|
committer | Lang Hames <lhames@gmail.com> | 2010-09-25 12:04:16 +0000 |
commit | 6e2968c85c1e162ee5bc813769eab223e3df0f15 (patch) | |
tree | 8c7b9a8fdb534794e6343b17ca5da22b416db723 /lib/CodeGen | |
parent | 8db2defa839d8a510391ba28564b413c78326cda (diff) |
Removed VNInfo::isDefAccurate(). Def "accuracy" can be checked by testing whether LiveIntervals::getInstructionFromIndex(def) returns NULL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114791 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r-- | lib/CodeGen/InlineSpiller.cpp | 12 | ||||
-rw-r--r-- | lib/CodeGen/LiveInterval.cpp | 5 | ||||
-rw-r--r-- | lib/CodeGen/LiveIntervalAnalysis.cpp | 38 | ||||
-rw-r--r-- | lib/CodeGen/PreAllocSplitting.cpp | 20 | ||||
-rw-r--r-- | lib/CodeGen/RegAllocLinearScan.cpp | 8 | ||||
-rw-r--r-- | lib/CodeGen/RegAllocPBQP.cpp | 2 | ||||
-rw-r--r-- | lib/CodeGen/SimpleRegisterCoalescing.cpp | 19 | ||||
-rw-r--r-- | lib/CodeGen/Spiller.cpp | 22 | ||||
-rw-r--r-- | lib/CodeGen/SplitKit.cpp | 4 | ||||
-rw-r--r-- | lib/CodeGen/Splitter.cpp | 21 |
10 files changed, 75 insertions, 76 deletions
diff --git a/lib/CodeGen/InlineSpiller.cpp b/lib/CodeGen/InlineSpiller.cpp index b965bfdcf3..12f6d070aa 100644 --- a/lib/CodeGen/InlineSpiller.cpp +++ b/lib/CodeGen/InlineSpiller.cpp @@ -233,8 +233,7 @@ bool InlineSpiller::reMaterializeFor(MachineBasicBlock::iterator MI) { } DEBUG(dbgs() << "\t " << UseIdx << '\t' << *MI); - VNInfo *DefVNI = NewLI.getNextValue(DefIdx, 0, true, - lis_.getVNInfoAllocator()); + VNInfo *DefVNI = NewLI.getNextValue(DefIdx, 0, lis_.getVNInfoAllocator()); NewLI.addRange(LiveRange(DefIdx, UseIdx.getDefIndex(), DefVNI)); DEBUG(dbgs() << "\tinterval: " << NewLI << '\n'); return true; @@ -249,7 +248,7 @@ void InlineSpiller::reMaterializeAll() { for (LiveInterval::const_vni_iterator I = li_->vni_begin(), E = li_->vni_end(); I != E; ++I) { VNInfo *VNI = *I; - if (VNI->isUnused() || !VNI->isDefAccurate()) + if (VNI->isUnused()) continue; MachineInstr *DefMI = lis_.getInstructionFromIndex(VNI->def); if (!DefMI || !tii_.isTriviallyReMaterializable(DefMI)) @@ -283,7 +282,7 @@ void InlineSpiller::reMaterializeAll() { lis_.RemoveMachineInstrFromMaps(DefMI); vrm_.RemoveMachineInstrFromMaps(DefMI); DefMI->eraseFromParent(); - VNI->setIsDefAccurate(false); + VNI->def = lis_.getZeroIndex(); anyRemoved = true; } @@ -366,7 +365,7 @@ void InlineSpiller::insertReload(LiveInterval &NewLI, SlotIndex LoadIdx = lis_.InsertMachineInstrInMaps(MI).getDefIndex(); vrm_.addSpillSlotUse(stackSlot_, MI); DEBUG(dbgs() << "\treload: " << LoadIdx << '\t' << *MI); - VNInfo *LoadVNI = NewLI.getNextValue(LoadIdx, 0, true, + VNInfo *LoadVNI = NewLI.getNextValue(LoadIdx, 0, lis_.getVNInfoAllocator()); NewLI.addRange(LiveRange(LoadIdx, Idx, LoadVNI)); } @@ -381,8 +380,7 @@ void InlineSpiller::insertSpill(LiveInterval &NewLI, SlotIndex StoreIdx = lis_.InsertMachineInstrInMaps(MI).getDefIndex(); vrm_.addSpillSlotUse(stackSlot_, MI); DEBUG(dbgs() << "\tspilled: " << StoreIdx << '\t' << *MI); - VNInfo *StoreVNI = NewLI.getNextValue(Idx, 0, true, - lis_.getVNInfoAllocator()); + VNInfo *StoreVNI = NewLI.getNextValue(Idx, 0, lis_.getVNInfoAllocator()); NewLI.addRange(LiveRange(Idx, StoreIdx, StoreVNI)); } diff --git a/lib/CodeGen/LiveInterval.cpp b/lib/CodeGen/LiveInterval.cpp index 44101ffee7..b4f0a94e97 100644 --- a/lib/CodeGen/LiveInterval.cpp +++ b/lib/CodeGen/LiveInterval.cpp @@ -678,10 +678,7 @@ void LiveInterval::print(raw_ostream &OS, const TargetRegisterInfo *TRI) const { if (vni->isUnused()) { OS << "x"; } else { - if (!vni->isDefAccurate() && !vni->isPHIDef()) - OS << "?"; - else - OS << vni->def; + OS << vni->def; if (vni->hasPHIKill()) OS << "-phikill"; if (vni->hasRedefByEC()) diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index d30596a817..c1e8ce560a 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -285,8 +285,8 @@ bool LiveIntervals::isPartialRedef(SlotIndex MIIdx, MachineOperand &MO, SlotIndex RedefIndex = MIIdx.getDefIndex(); const LiveRange *OldLR = interval.getLiveRangeContaining(RedefIndex.getUseIndex()); - if (OldLR->valno->isDefAccurate()) { - MachineInstr *DefMI = getInstructionFromIndex(OldLR->valno->def); + MachineInstr *DefMI = getInstructionFromIndex(OldLR->valno->def); + if (DefMI != 0) { return DefMI->findRegisterDefOperandIdx(interval.reg) != -1; } return false; @@ -326,8 +326,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb, CopyMI = mi; } - VNInfo *ValNo = interval.getNextValue(defIndex, CopyMI, true, - VNInfoAllocator); + VNInfo *ValNo = interval.getNextValue(defIndex, CopyMI, VNInfoAllocator); assert(ValNo->id == 0 && "First value in interval is not 0?"); // Loop over all of the blocks that the vreg is defined in. There are @@ -393,7 +392,9 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb, // Create interval with one of a NEW value number. Note that this value // number isn't actually defined by an instruction, weird huh? :) if (PHIJoin) { - ValNo = interval.getNextValue(Start, 0, false, VNInfoAllocator); + assert(getInstructionFromIndex(Start) == 0 && + "PHI def index points at actual instruction."); + ValNo = interval.getNextValue(Start, 0, VNInfoAllocator); ValNo->setIsPHIDef(true); } LiveRange LR(Start, killIdx, ValNo); @@ -439,10 +440,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb, // The new value number (#1) is defined by the instruction we claimed // defined value #0. - VNInfo *ValNo = interval.getNextValue(OldValNo->def, OldValNo->getCopy(), - false, // update at * - VNInfoAllocator); - ValNo->setFlags(OldValNo->getFlags()); // * <- updating here + VNInfo *ValNo = interval.createValueCopy(OldValNo, VNInfoAllocator); // Value#0 is now defined by the 2-addr instruction. OldValNo->def = RedefIndex; @@ -480,7 +478,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb, MachineInstr *CopyMI = NULL; if (mi->isCopyLike()) CopyMI = mi; - ValNo = interval.getNextValue(defIndex, CopyMI, true, VNInfoAllocator); + ValNo = interval.getNextValue(defIndex, CopyMI, VNInfoAllocator); SlotIndex killIndex = getMBBEndIdx(mbb); LiveRange LR(defIndex, killIndex, ValNo); @@ -575,7 +573,7 @@ exit: LiveInterval::iterator OldLR = interval.FindLiveRangeContaining(start); bool Extend = OldLR != interval.end(); VNInfo *ValNo = Extend - ? OldLR->valno : interval.getNextValue(start, CopyMI, true, VNInfoAllocator); + ? OldLR->valno : interval.getNextValue(start, CopyMI, VNInfoAllocator); if (MO.isEarlyClobber() && Extend) ValNo->setHasRedefByEC(true); LiveRange LR(start, end, ValNo); @@ -671,8 +669,11 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB, } } + SlotIndex defIdx = getMBBStartIdx(MBB); + assert(getInstructionFromIndex(defIdx) == 0 && + "PHI def index points at actual instruction."); VNInfo *vni = - interval.getNextValue(getMBBStartIdx(MBB), 0, false, VNInfoAllocator); + interval.getNextValue(defIdx, 0, VNInfoAllocator); vni->setIsPHIDef(true); LiveRange LR(start, end, vni); @@ -863,9 +864,9 @@ bool LiveIntervals::isReMaterializable(const LiveInterval &li, if (VNI->isUnused()) continue; // Dead val#. // Is the def for the val# rematerializable? - if (!VNI->isDefAccurate()) - return false; MachineInstr *ReMatDefMI = getInstructionFromIndex(VNI->def); + if (!ReMatDefMI) + return false; bool DefIsLoad = false; if (!ReMatDefMI || !isReMaterializable(li, VNI, ReMatDefMI, SpillIs, DefIsLoad)) @@ -1188,7 +1189,7 @@ rewriteInstructionForSpills(const LiveInterval &li, const VNInfo *VNI, if (HasUse) { if (CreatedNewVReg) { LiveRange LR(index.getLoadIndex(), index.getDefIndex(), - nI.getNextValue(SlotIndex(), 0, false, VNInfoAllocator)); + nI.getNextValue(SlotIndex(), 0, VNInfoAllocator)); DEBUG(dbgs() << " +" << LR); nI.addRange(LR); } else { @@ -1202,7 +1203,7 @@ rewriteInstructionForSpills(const LiveInterval &li, const VNInfo *VNI, } if (HasDef) { LiveRange LR(index.getDefIndex(), index.getStoreIndex(), - nI.getNextValue(SlotIndex(), 0, false, VNInfoAllocator)); + nI.getNextValue(SlotIndex(), 0, VNInfoAllocator)); DEBUG(dbgs() << " +" << LR); nI.addRange(LR); } @@ -1651,8 +1652,7 @@ addIntervalsForSpills(const LiveInterval &li, if (VNI->isUnused()) continue; // Dead val#. // Is the def for the val# rematerializable? - MachineInstr *ReMatDefMI = VNI->isDefAccurate() - ? getInstructionFromIndex(VNI->def) : 0; + MachineInstr *ReMatDefMI = getInstructionFromIndex(VNI->def); bool dummy; if (ReMatDefMI && isReMaterializable(li, VNI, ReMatDefMI, SpillIs, dummy)) { // Remember how to remat the def of this val#. @@ -1994,7 +1994,7 @@ LiveRange LiveIntervals::addLiveRangeToEndOfBlock(unsigned reg, LiveInterval& Interval = getOrCreateInterval(reg); VNInfo* VN = Interval.getNextValue( SlotIndex(getInstructionIndex(startInst).getDefIndex()), - startInst, true, getVNInfoAllocator()); + startInst, getVNInfoAllocator()); VN->setHasPHIKill(true); LiveRange LR( SlotIndex(getInstructionIndex(startInst).getDefIndex()), diff --git a/lib/CodeGen/PreAllocSplitting.cpp b/lib/CodeGen/PreAllocSplitting.cpp index cd9d83eeb6..ee228a9f61 100644 --- a/lib/CodeGen/PreAllocSplitting.cpp +++ b/lib/CodeGen/PreAllocSplitting.cpp @@ -324,7 +324,7 @@ int PreAllocSplitting::CreateSpillStackSlot(unsigned Reg, if (CurrSLI->hasAtLeastOneValue()) CurrSValNo = CurrSLI->getValNumInfo(0); else - CurrSValNo = CurrSLI->getNextValue(SlotIndex(), 0, false, + CurrSValNo = CurrSLI->getNextValue(SlotIndex(), 0, LSs->getVNInfoAllocator()); return SS; } @@ -585,7 +585,7 @@ PreAllocSplitting::PerformPHIConstructionFallBack(MachineBasicBlock::iterator Us SlotIndex StartIndex = LIs->getMBBStartIdx(MBB); VNInfo *RetVNI = Phis[MBB] = - LI->getNextValue(SlotIndex(), /*FIXME*/ 0, false, + LI->getNextValue(SlotIndex(), /*FIXME*/ 0, LIs->getVNInfoAllocator()); if (!IsIntraBlock) LiveOut[MBB] = RetVNI; @@ -674,7 +674,7 @@ void PreAllocSplitting::ReconstructLiveInterval(LiveInterval* LI) { DefIdx = DefIdx.getDefIndex(); assert(!DI->isPHI() && "PHI instr in code during pre-alloc splitting."); - VNInfo* NewVN = LI->getNextValue(DefIdx, 0, true, Alloc); + VNInfo* NewVN = LI->getNextValue(DefIdx, 0, Alloc); // If the def is a move, set the copy field. if (DI->isCopyLike() && DI->getOperand(0).getReg() == LI->reg) @@ -807,7 +807,8 @@ bool PreAllocSplitting::Rematerialize(unsigned VReg, VNInfo* ValNo, MachineBasicBlock& MBB = *RestorePt->getParent(); MachineBasicBlock::iterator KillPt = BarrierMBB->end(); - if (!ValNo->isDefAccurate() || DefMI->getParent() == BarrierMBB) + if (LIs->getInstructionFromIndex(ValNo->def) == 0 || + DefMI->getParent() == BarrierMBB) KillPt = findSpillPoint(BarrierMBB, Barrier, NULL, RefsInMBB); else KillPt = llvm::next(MachineBasicBlock::iterator(DefMI)); @@ -872,7 +873,7 @@ MachineInstr* PreAllocSplitting::FoldSpill(unsigned vreg, if (CurrSLI->hasAtLeastOneValue()) CurrSValNo = CurrSLI->getValNumInfo(0); else - CurrSValNo = CurrSLI->getNextValue(SlotIndex(), 0, false, + CurrSValNo = CurrSLI->getNextValue(SlotIndex(), 0, LSs->getVNInfoAllocator()); } @@ -967,8 +968,7 @@ bool PreAllocSplitting::SplitRegLiveInterval(LiveInterval *LI) { assert(!ValNo->isUnused() && "Val# is defined by a dead def?"); - MachineInstr *DefMI = ValNo->isDefAccurate() - ? LIs->getInstructionFromIndex(ValNo->def) : NULL; + MachineInstr *DefMI = LIs->getInstructionFromIndex(ValNo->def); // If this would create a new join point, do not split. if (DefMI && createsNewJoin(LR, DefMI->getParent(), Barrier->getParent())) { @@ -1005,7 +1005,7 @@ bool PreAllocSplitting::SplitRegLiveInterval(LiveInterval *LI) { SlotIndex SpillIndex; MachineInstr *SpillMI = NULL; int SS = -1; - if (!ValNo->isDefAccurate()) { + if (LIs->getInstructionFromIndex(ValNo->def) == 0) { // If we don't know where the def is we must split just before the barrier. if ((SpillMI = FoldSpill(LI->reg, RC, 0, Barrier, BarrierMBB, SS, RefsInMBB))) { @@ -1199,12 +1199,12 @@ bool PreAllocSplitting::removeDeadSpills(SmallPtrSet<LiveInterval*, 8>& split) { // We also don't try to handle the results of PHI joins, since there's // no defining instruction to analyze. - if (!CurrVN->isDefAccurate() || CurrVN->isUnused()) continue; + MachineInstr* DefMI = LIs->getInstructionFromIndex(CurrVN->def); + if (!DefMI || CurrVN->isUnused()) continue; // We're only interested in eliminating cruft introduced by the splitter, // is of the form load-use or load-use-store. First, check that the // definition is a load, and remember what stack slot we loaded it from. - MachineInstr* DefMI = LIs->getInstructionFromIndex(CurrVN->def); int FrameIndex; if (!TII->isLoadFromStackSlot(DefMI, FrameIndex)) continue; diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp index 5c62354a88..a4fdcfaa3b 100644 --- a/lib/CodeGen/RegAllocLinearScan.cpp +++ b/lib/CodeGen/RegAllocLinearScan.cpp @@ -431,8 +431,7 @@ unsigned RALinScan::attemptTrivialCoalescing(LiveInterval &cur, unsigned Reg) { unsigned CandReg; { MachineInstr *CopyMI; - if (vni->def != SlotIndex() && vni->isDefAccurate() && - (CopyMI = li_->getInstructionFromIndex(vni->def)) && CopyMI->isCopy()) + if ((CopyMI = li_->getInstructionFromIndex(vni->def)) && CopyMI->isCopy()) // Defined by a copy, try to extend SrcReg forward CandReg = CopyMI->getOperand(1).getReg(); else if (TrivCoalesceEnds && @@ -800,7 +799,7 @@ static void addStackInterval(LiveInterval *cur, LiveStacks *ls_, if (SI.hasAtLeastOneValue()) VNI = SI.getValNumInfo(0); else - VNI = SI.getNextValue(SlotIndex(), 0, false, + VNI = SI.getNextValue(SlotIndex(), 0, ls_->getVNInfoAllocator()); LiveInterval &RI = li_->getInterval(cur->reg); @@ -984,8 +983,7 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur) { // one, e.g. X86::mov32to32_. These move instructions are not coalescable. if (!vrm_->getRegAllocPref(cur->reg) && cur->hasAtLeastOneValue()) { VNInfo *vni = cur->begin()->valno; - if ((vni->def != SlotIndex()) && !vni->isUnused() && - vni->isDefAccurate()) { + if (!vni->isUnused()) { MachineInstr *CopyMI = li_->getInstructionFromIndex(vni->def); if (CopyMI && CopyMI->isCopy()) { unsigned DstSubReg = CopyMI->getOperand(0).getSubReg(); diff --git a/lib/CodeGen/RegAllocPBQP.cpp b/lib/CodeGen/RegAllocPBQP.cpp index 0db5053f6d..a45ead868d 100644 --- a/lib/CodeGen/RegAllocPBQP.cpp +++ b/lib/CodeGen/RegAllocPBQP.cpp @@ -1014,7 +1014,7 @@ void RegAllocPBQP::addStackInterval(const LiveInterval *spilled, vni = stackInterval.getValNumInfo(0); else vni = stackInterval.getNextValue( - SlotIndex(), 0, false, lss->getVNInfoAllocator()); + SlotIndex(), 0, lss->getVNInfoAllocator()); LiveInterval &rhsInterval = lis->getInterval(spilled->reg); stackInterval.MergeRangesInAsValue(rhsInterval, vni); diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index b29ea19835..65e21edee6 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -218,7 +218,7 @@ bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(const CoalescerPair &CP, continue; LiveInterval &SRLI = li_->getInterval(*SR); SRLI.addRange(LiveRange(FillerStart, FillerEnd, - SRLI.getNextValue(FillerStart, 0, true, + SRLI.getNextValue(FillerStart, 0, li_->getVNInfoAllocator()))); } } @@ -267,7 +267,8 @@ bool SimpleRegisterCoalescing::HasOtherReachingDefs(LiveInterval &IntA, if (BI->valno == BValNo) continue; // When BValNo is null, we're looking for a dummy clobber-value for a subreg. - if (!BValNo && !BI->valno->isDefAccurate() && !BI->valno->getCopy()) + if (!BValNo && li_->getInstructionFromIndex(BI->valno->def) == 0 && + !BI->valno->getCopy()) continue; if (BI->start <= AI->start && BI->end > AI->start) return true; @@ -351,12 +352,11 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(const CoalescerPair &CP, assert(ALR != IntA.end() && "Live range not found!"); VNInfo *AValNo = ALR->valno; // If other defs can reach uses of this def, then it's not safe to perform - // the optimization. FIXME: Do isPHIDef and isDefAccurate both need to be - // tested? - if (AValNo->isPHIDef() || !AValNo->isDefAccurate() || - AValNo->isUnused() || AValNo->hasPHIKill()) - return false; + // the optimization. MachineInstr *DefMI = li_->getInstructionFromIndex(AValNo->def); + if (AValNo->isPHIDef() || DefMI == 0 || AValNo->isUnused() || + AValNo->hasPHIKill()) + return false; if (!DefMI) return false; const TargetInstrDesc &TID = DefMI->getDesc(); @@ -652,9 +652,8 @@ bool SimpleRegisterCoalescing::ReMaterializeTrivialDef(LiveInterval &SrcInt, assert(SrcLR != SrcInt.end() && "Live range not found!"); VNInfo *ValNo = SrcLR->valno; // If other defs can reach uses of this def, then it's not safe to perform - // the optimization. FIXME: Do isPHIDef and isDefAccurate both need to be - // tested? - if (ValNo->isPHIDef() || !ValNo->isDefAccurate() || + // the optimization. + if (ValNo->isPHIDef() || li_->getInstructionFromIndex(ValNo->def)==0 || ValNo->isUnused() || ValNo->hasPHIKill()) return false; MachineInstr *DefMI = li_->getInstructionFromIndex(ValNo->def); diff --git a/lib/CodeGen/Spiller.cpp b/lib/CodeGen/Spiller.cpp index 40bb386c34..661b79c1b3 100644 --- a/lib/CodeGen/Spiller.cpp +++ b/lib/CodeGen/Spiller.cpp @@ -144,7 +144,7 @@ protected: vrm->addSpillSlotUse(ss, loadInstr); SlotIndex endIndex = loadIndex.getNextIndex(); VNInfo *loadVNI = - newLI->getNextValue(loadIndex, 0, true, lis->getVNInfoAllocator()); + newLI->getNextValue(loadIndex, 0, lis->getVNInfoAllocator()); newLI->addRange(LiveRange(loadIndex, endIndex, loadVNI)); } @@ -158,7 +158,7 @@ protected: vrm->addSpillSlotUse(ss, storeInstr); SlotIndex beginIndex = storeIndex.getPrevIndex(); VNInfo *storeVNI = - newLI->getNextValue(beginIndex, 0, true, lis->getVNInfoAllocator()); + newLI->getNextValue(beginIndex, 0, lis->getVNInfoAllocator()); newLI->addRange(LiveRange(beginIndex, storeIndex, storeVNI)); } @@ -297,7 +297,8 @@ private: /// Extract the given value number from the interval. LiveInterval* extractVNI(LiveInterval *li, VNInfo *vni) const { - assert(vni->isDefAccurate() || vni->isPHIDef()); + assert((lis->getInstructionFromIndex(vni->def) != 0 || vni->isPHIDef()) && + "Def index not sane?"); // Create a new vreg and live interval, copy VNI ranges over. const TargetRegisterClass *trc = mri->getRegClass(li->reg); @@ -335,8 +336,11 @@ private: tii->get(TargetOpcode::COPY), newVReg) .addReg(li->reg, RegState::Kill); SlotIndex copyIdx = lis->InsertMachineInstrInMaps(copyMI); - VNInfo *phiDefVNI = li->getNextValue(lis->getMBBStartIdx(defMBB), - 0, false, lis->getVNInfoAllocator()); + SlotIndex phiDefIdx = lis->getMBBStartIdx(defMBB); + assert(lis->getInstructionFromIndex(phiDefIdx) == 0 && + "PHI def index points at actual instruction."); + VNInfo *phiDefVNI = li->getNextValue(phiDefIdx, + 0, lis->getVNInfoAllocator()); phiDefVNI->setIsPHIDef(true); li->addRange(LiveRange(phiDefVNI->def, copyIdx.getDefIndex(), phiDefVNI)); LiveRange *oldPHIDefRange = @@ -358,7 +362,6 @@ private: newVNI->def = copyIdx.getDefIndex(); newVNI->setCopy(copyMI); newVNI->setIsPHIDef(false); // not a PHI def anymore. - newVNI->setIsDefAccurate(true); } else { // non-PHI def. Rename the def. If it's two-addr that means renaming the // use and inserting a new copy too. @@ -391,7 +394,7 @@ private: li->getLiveRangeContaining(newVNI->def.getUseIndex()); origUseRange->end = copyIdx.getDefIndex(); VNInfo *copyVNI = newLI->getNextValue(copyIdx.getDefIndex(), copyMI, - true, lis->getVNInfoAllocator()); + lis->getVNInfoAllocator()); LiveRange copyRange(copyIdx.getDefIndex(),defIdx.getDefIndex(),copyVNI); newLI->addRange(copyRange); } @@ -448,7 +451,7 @@ private: // Insert a new range & vni for the two-address-to-copy value. This // will be attached to the new live interval. VNInfo *copyVNI = - newLI->getNextValue(useIdx.getDefIndex(), 0, true, + newLI->getNextValue(useIdx.getDefIndex(), 0, lis->getVNInfoAllocator()); LiveRange copyRange(useIdx.getDefIndex(),copyIdx.getDefIndex(),copyVNI); newLI->addRange(copyRange); @@ -481,8 +484,7 @@ private: } VNInfo *newKillVNI = li->getNextValue(copyIdx.getDefIndex(), - copyMI, true, - lis->getVNInfoAllocator()); + copyMI, lis->getVNInfoAllocator()); newKillVNI->setHasPHIKill(true); li->addRange(LiveRange(copyIdx.getDefIndex(), lis->getMBBEndIdx(killMBB), diff --git a/lib/CodeGen/SplitKit.cpp b/lib/CodeGen/SplitKit.cpp index da85b428b5..048f6ab1ba 100644 --- a/lib/CodeGen/SplitKit.cpp +++ b/lib/CodeGen/SplitKit.cpp @@ -365,7 +365,7 @@ VNInfo *LiveIntervalMap::defValue(const VNInfo *ParentVNI, SlotIndex Idx) { assert(parentli_.getVNInfoAt(Idx) == ParentVNI && "Bad ParentVNI"); // Create a new value. - VNInfo *VNI = li_->getNextValue(Idx, 0, true, lis_.getVNInfoAllocator()); + VNInfo *VNI = li_->getNextValue(Idx, 0, lis_.getVNInfoAllocator()); // Use insert for lookup, so we can add missing values with a second lookup. std::pair<ValueMap::iterator,bool> InsP = @@ -468,7 +468,7 @@ VNInfo *LiveIntervalMap::mapValue(const VNInfo *ParentVNI, SlotIndex Idx, // We have a collision between the old and new VNI at Succ. That means // neither dominates and we need a new phi-def. - VNI = li_->getNextValue(Start, 0, true, lis_.getVNInfoAllocator()); + VNI = li_->getNextValue(Start, 0, lis_.getVNInfoAllocator()); VNI->setIsPHIDef(true); InsP.first->second = VNI; diff --git a/lib/CodeGen/Splitter.cpp b/lib/CodeGen/Splitter.cpp index 1cb2f62dbc..825782d69a 100644 --- a/lib/CodeGen/Splitter.cpp +++ b/lib/CodeGen/Splitter.cpp @@ -140,7 +140,6 @@ namespace llvm { VNInfo *newVal = getNewVNI(preHeaderRange->valno); newVal->def = copyDefIdx; newVal->setCopy(copy); - newVal->setIsDefAccurate(true); li.removeRange(copyDefIdx, ls.lis->getMBBEndIdx(preHeader), true); getNewLI()->addRange(LiveRange(copyDefIdx, @@ -174,12 +173,13 @@ namespace llvm { // Blow away output range definition. outRange->valno->def = ls.lis->getInvalidIndex(); - outRange->valno->setIsDefAccurate(false); li.removeRange(ls.lis->getMBBStartIdx(outBlock), copyDefIdx); + SlotIndex newDefIdx = ls.lis->getMBBStartIdx(outBlock); + assert(ls.lis->getInstructionFromIndex(newDefIdx) == 0 && + "PHI def index points at actual instruction."); VNInfo *newVal = - getNewLI()->getNextValue(ls.lis->getMBBStartIdx(outBlock), - 0, false, ls.lis->getVNInfoAllocator()); + getNewLI()->getNextValue(newDefIdx, 0, ls.lis->getVNInfoAllocator()); getNewLI()->addRange(LiveRange(ls.lis->getMBBStartIdx(outBlock), copyDefIdx, newVal)); @@ -513,8 +513,10 @@ namespace llvm { if (!insertRange) continue; - VNInfo *newVal = li.getNextValue(lis->getMBBStartIdx(preHeader), - 0, false, lis->getVNInfoAllocator()); + SlotIndex newDefIdx = lis->getMBBStartIdx(preHeader); + assert(lis->getInstructionFromIndex(newDefIdx) == 0 && + "PHI def index points at actual instruction."); + VNInfo *newVal = li.getNextValue(newDefIdx, 0, lis->getVNInfoAllocator()); li.addRange(LiveRange(lis->getMBBStartIdx(preHeader), lis->getMBBEndIdx(preHeader), newVal)); @@ -611,8 +613,11 @@ namespace llvm { lis->getMBBEndIdx(splitBlock), true); } } else if (intersects) { - VNInfo *newVal = li.getNextValue(lis->getMBBStartIdx(splitBlock), - 0, false, lis->getVNInfoAllocator()); + SlotIndex newDefIdx = lis->getMBBStartIdx(splitBlock); + assert(lis->getInstructionFromIndex(newDefIdx) == 0 && + "PHI def index points at actual instruction."); + VNInfo *newVal = li.getNextValue(newDefIdx, 0, + lis->getVNInfoAllocator()); li.addRange(LiveRange(lis->getMBBStartIdx(splitBlock), lis->getMBBEndIdx(splitBlock), newVal)); |