diff options
author | Chris Lattner <sabre@nondot.org> | 2009-04-30 00:48:50 +0000 |
---|---|---|
committer | Chris Lattner <sabre@nondot.org> | 2009-04-30 00:48:50 +0000 |
commit | 6c147293d63e836e3677eb933ff0513c7cad1e6a (patch) | |
tree | ee0747f3bcefcead033152b33d01a5d67c290460 /lib/CodeGen | |
parent | 610079287ef50721548a0399c126076be3a9a508 (diff) |
fix a regression handling indirect results: these need to be considered
memory operands otherwise the writebacks get lost when the inline asm
doesn't otherwise have side effects. This fixes rdar://6839427, though
clang really shouldn't generate these anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70455 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp | 21 |
1 files changed, 13 insertions, 8 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp index 01d73b3ffb..71f5d81314 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp @@ -5075,6 +5075,10 @@ hasInlineAsmMemConstraint(std::vector<InlineAsm::ConstraintInfo> &CInfos, if (CType == TargetLowering::C_Memory) return true; } + + // Indirect operand accesses access memory. + if (CI.isIndirect) + return true; } return false; @@ -5088,11 +5092,6 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) { /// ConstraintOperands - Information about all of the constraints. std::vector<SDISelAsmOperandInfo> ConstraintOperands; - // We won't need to flush pending loads if this asm doesn't touch - // memory and is nonvolatile. - SDValue Chain = IA->hasSideEffects() ? getRoot() : DAG.getRoot(); - SDValue Flag; - std::set<unsigned> OutputRegs, InputRegs; // Do a prepass over the constraints, canonicalizing them, and building up the @@ -5101,10 +5100,15 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) { ConstraintInfos = IA->ParseConstraints(); bool hasMemory = hasInlineAsmMemConstraint(ConstraintInfos, TLI); - // Flush pending loads if this touches memory (includes clobbering it). - // It's possible this is overly conservative. - if (hasMemory) + + SDValue Chain, Flag; + + // We won't need to flush pending loads if this asm doesn't touch + // memory and is nonvolatile. + if (hasMemory || IA->hasSideEffects()) Chain = getRoot(); + else + Chain = DAG.getRoot(); unsigned ArgNo = 0; // ArgNo - The argument of the CallInst. unsigned ResNo = 0; // ResNo - The result number of the next output. @@ -5482,6 +5486,7 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) { SDValue OutVal = OutRegs.getCopyFromRegs(DAG, getCurDebugLoc(), Chain, &Flag); StoresToEmit.push_back(std::make_pair(OutVal, Ptr)); + } // Emit the non-flagged stores from the physregs. |