diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2008-03-31 20:40:39 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2008-03-31 20:40:39 +0000 |
| commit | ca1267c02b025cc719190b05f9e1a5d174a9caf7 (patch) | |
| tree | a8921720d5eb9a89fd51a67b3015ea634fafb83a /lib/CodeGen/VirtRegMap.cpp | |
| parent | b061c4bc44caf62a16adad6047cda60785c2d0a4 (diff) | |
Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48995 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/VirtRegMap.cpp')
| -rw-r--r-- | lib/CodeGen/VirtRegMap.cpp | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp index 264ab14569..91b108f72f 100644 --- a/lib/CodeGen/VirtRegMap.cpp +++ b/lib/CodeGen/VirtRegMap.cpp @@ -642,9 +642,10 @@ static void UpdateKills(MachineInstr &MI, BitVector &RegKills, static void ReMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MII, unsigned DestReg, unsigned Reg, + const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, VirtRegMap &VRM) { - TRI->reMaterialize(MBB, MII, DestReg, VRM.getReMaterializedMI(Reg)); + TII->reMaterialize(MBB, MII, DestReg, VRM.getReMaterializedMI(Reg)); MachineInstr *NewMI = prior(MII); for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) { MachineOperand &MO = NewMI->getOperand(i); @@ -784,7 +785,7 @@ namespace { MachineBasicBlock::iterator MII = MI; if (NewOp.StackSlotOrReMat > VirtRegMap::MAX_STACK_SLOT) { - ReMaterialize(*MBB, MII, NewPhysReg, NewOp.VirtReg, TRI, VRM); + ReMaterialize(*MBB, MII, NewPhysReg, NewOp.VirtReg, TII, TRI,VRM); } else { TII->loadRegFromStackSlot(*MBB, MII, NewPhysReg, NewOp.StackSlotOrReMat, AliasRC); @@ -1098,7 +1099,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) { unsigned Phys = VRM.getPhys(VirtReg); RegInfo->setPhysRegUsed(Phys); if (VRM.isReMaterialized(VirtReg)) { - ReMaterialize(MBB, MII, Phys, VirtReg, TRI, VRM); + ReMaterialize(MBB, MII, Phys, VirtReg, TII, TRI, VRM); } else { const TargetRegisterClass* RC = RegInfo->getRegClass(VirtReg); int SS = VRM.getStackSlot(VirtReg); @@ -1351,7 +1352,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) { RegInfo->setPhysRegUsed(PhysReg); ReusedOperands.markClobbered(PhysReg); if (DoReMat) { - ReMaterialize(MBB, MII, PhysReg, VirtReg, TRI, VRM); + ReMaterialize(MBB, MII, PhysReg, VirtReg, TII, TRI, VRM); } else { const TargetRegisterClass* RC = RegInfo->getRegClass(VirtReg); TII->loadRegFromStackSlot(MBB, &MI, PhysReg, SSorRMId, RC); |