diff options
author | Alkis Evlogimenos <alkis@evlogimenos.com> | 2004-01-05 02:25:45 +0000 |
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committer | Alkis Evlogimenos <alkis@evlogimenos.com> | 2004-01-05 02:25:45 +0000 |
commit | 271bd2d7f1c8dca9906a9b9b9d3081b9040e2f48 (patch) | |
tree | 59f64652a3a33751c0e34b8018121bce3ac93658 /lib/CodeGen/TwoAddressInstructionPass.cpp | |
parent | 50c047d159a7f6d9a22e17178576c7ac5178356a (diff) |
Currently we cannot handle two-address instructions of the form:
A = B op C where A == C, but this cannot really occur in practice
because of SSA form. Add an assert to check that just to be safe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10682 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/TwoAddressInstructionPass.cpp')
-rw-r--r-- | lib/CodeGen/TwoAddressInstructionPass.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp index 41b3cbd8ed..b758e7fd22 100644 --- a/lib/CodeGen/TwoAddressInstructionPass.cpp +++ b/lib/CodeGen/TwoAddressInstructionPass.cpp @@ -123,6 +123,15 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &fn) { bool regAisPhysical = regA < MRegisterInfo::FirstVirtualRegister; bool regBisPhysical = regB < MRegisterInfo::FirstVirtualRegister; + // first make sure we do not have a use of a in the + // instruction (a = b + a for example) because our + // transofrmation will not work. This should never occur + // because of SSA. + for (unsigned i = 1; i < mi->getNumOperands(); ++i) { + assert(!mi->getOperand(i).isRegister() || + mi->getOperand(i).getAllocatedRegNum() != regA); + } + const TargetRegisterClass* rc = regAisPhysical ? mri_->getRegClass(regA) : mf_->getSSARegMap()->getRegClass(regA); |