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authorJakob Stoklund Olesen <stoklund@2pi.dk>2011-05-02 05:29:58 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2011-05-02 05:29:58 +0000
commitbb30dd40ed0873e39fec4dfa321091a0c8d1abfc (patch)
tree39b71daa0cb178f98f176b164ad2db3677dd6ee2 /lib/CodeGen/SplitKit.cpp
parent8e33095cd45b8be6b8dba9be8b2e72164494a7fe (diff)
Minimize the slot indexes spanned by register ranges created when splitting.
When an interfering live range ends at a dead slot index between two instructions, make sure that the inserted copy instruction gets a slot index after the dead ones. This makes it possible to avoid the interference. Ideally, there shouldn't be interference ending at a deleted instruction, but physical register coalescing can sometimes do that to sub-registers. This fixes PR9823. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130687 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SplitKit.cpp')
-rw-r--r--lib/CodeGen/SplitKit.cpp9
1 files changed, 7 insertions, 2 deletions
diff --git a/lib/CodeGen/SplitKit.cpp b/lib/CodeGen/SplitKit.cpp
index 427ef94ad7..ac9d72bf62 100644
--- a/lib/CodeGen/SplitKit.cpp
+++ b/lib/CodeGen/SplitKit.cpp
@@ -579,15 +579,20 @@ VNInfo *SplitEditor::defFromParent(unsigned RegIdx,
SlotIndex Def;
LiveInterval *LI = Edit->get(RegIdx);
+ // We may be trying to avoid interference that ends at a deleted instruction,
+ // so always begin RegIdx 0 early and all others late.
+ bool Late = RegIdx != 0;
+
// Attempt cheap-as-a-copy rematerialization.
LiveRangeEdit::Remat RM(ParentVNI);
if (Edit->canRematerializeAt(RM, UseIdx, true, LIS)) {
- Def = Edit->rematerializeAt(MBB, I, LI->reg, RM, LIS, TII, TRI);
+ Def = Edit->rematerializeAt(MBB, I, LI->reg, RM, LIS, TII, TRI, Late);
} else {
// Can't remat, just insert a copy from parent.
CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg)
.addReg(Edit->getReg());
- Def = LIS.InsertMachineInstrInMaps(CopyMI).getDefIndex();
+ Def = LIS.getSlotIndexes()->insertMachineInstrInMaps(CopyMI, Late)
+ .getDefIndex();
}
// Define the value in Reg.