diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2009-06-18 02:04:01 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-06-18 02:04:01 +0000 |
| commit | f9f1da17f8bd6ffb2df62ce3cb933f0ee63f8da4 (patch) | |
| tree | 03b4831fb34e361de779ebe31c14b6007245bff3 /lib/CodeGen/SimpleRegisterCoalescing.cpp | |
| parent | 063989455d9ce10e61e2c617394d403218b3ec03 (diff) | |
- Update register allocation hint after coalescing. This is done by the target since the hint is target dependent. This is important for ARM register pair hints.
- Register allocator should resolve the second part of the hint (register number) before passing it to the target since it knows virtual register to physical register mapping.
- More fixes to get ARM load / store double word working.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73671 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SimpleRegisterCoalescing.cpp')
| -rw-r--r-- | lib/CodeGen/SimpleRegisterCoalescing.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index c363ba52b5..20348055bd 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -1766,6 +1766,9 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { // being merged. li_->removeInterval(SrcReg); + // Update regalloc hint. + tri_->UpdateRegAllocHint(SrcReg, DstReg, *mf_); + // Manually deleted the live interval copy. if (SavedLI) { SavedLI->clear(); |
