diff options
| author | Bob Wilson <bob.wilson@apple.com> | 2010-12-17 01:21:05 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-12-17 01:21:05 +0000 |
| commit | c7c5e781a306efc62f86d88dc3b3d44057310c13 (patch) | |
| tree | 72c8cf1cf18b3fbb8da0a28c1c3d0e0fb89c4f7e /lib/CodeGen/SimpleRegisterCoalescing.cpp | |
| parent | 14595d967fa03e9f5d82fd47bb43720aa52f1034 (diff) | |
Fix a comment typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122016 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SimpleRegisterCoalescing.cpp')
| -rw-r--r-- | lib/CodeGen/SimpleRegisterCoalescing.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index 74e72af329..993f5feb5f 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -621,8 +621,8 @@ bool SimpleRegisterCoalescing::ReMaterializeTrivialDef(LiveInterval &SrcInt, return false; } - // If destination register has a sub-register index on it, make sure it mtches - // the instruction register class. + // If destination register has a sub-register index on it, make sure it + // matches the instruction register class. if (DstSubIdx) { const TargetInstrDesc &TID = DefMI->getDesc(); if (TID.getNumDefs() != 1) |