diff options
| author | Dan Gohman <gohman@apple.com> | 2007-09-14 20:33:02 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2007-09-14 20:33:02 +0000 |
| commit | 92dfe2001e96f6e2b6d327e8816f38033f88b295 (patch) | |
| tree | 14670779a18a50be87d7bbd426a595a04ca6ed77 /lib/CodeGen/SimpleRegisterCoalescing.cpp | |
| parent | 693f541526cdd5f084adc5b8a5a5b290401a0b8e (diff) | |
Remove isReg, isImm, and isMBB, and change all their users to use
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41958 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SimpleRegisterCoalescing.cpp')
| -rw-r--r-- | lib/CodeGen/SimpleRegisterCoalescing.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index 779c36a212..5ef838c33a 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -986,7 +986,7 @@ SimpleRegisterCoalescing::lastRegisterUse(unsigned Start, unsigned End, unsigned for (unsigned i = 0, NumOps = MI->getNumOperands(); i != NumOps; ++i) { MachineOperand &MO = MI->getOperand(i); - if (MO.isReg() && MO.isUse() && MO.getReg() && + if (MO.isRegister() && MO.isUse() && MO.getReg() && mri_->regsOverlap(rep(MO.getReg()), Reg)) { MOU = &MO; return MI; @@ -1005,7 +1005,7 @@ SimpleRegisterCoalescing::lastRegisterUse(unsigned Start, unsigned End, unsigned MachineOperand *SimpleRegisterCoalescing::findDefOperand(MachineInstr *MI, unsigned Reg) { for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { MachineOperand &MO = MI->getOperand(i); - if (MO.isReg() && MO.isDef() && + if (MO.isRegister() && MO.isDef() && mri_->regsOverlap(rep(MO.getReg()), Reg)) return &MO; } @@ -1017,7 +1017,7 @@ MachineOperand *SimpleRegisterCoalescing::findDefOperand(MachineInstr *MI, unsig void SimpleRegisterCoalescing::unsetRegisterKill(MachineInstr *MI, unsigned Reg) { for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { MachineOperand &MO = MI->getOperand(i); - if (MO.isReg() && MO.isKill() && MO.getReg() && + if (MO.isRegister() && MO.isKill() && MO.getReg() && mri_->regsOverlap(rep(MO.getReg()), Reg)) MO.unsetIsKill(); } @@ -1041,7 +1041,7 @@ void SimpleRegisterCoalescing::unsetRegisterKills(unsigned Start, unsigned End, for (unsigned i = 0, NumOps = MI->getNumOperands(); i != NumOps; ++i) { MachineOperand &MO = MI->getOperand(i); - if (MO.isReg() && MO.isKill() && MO.getReg() && + if (MO.isRegister() && MO.isKill() && MO.getReg() && mri_->regsOverlap(rep(MO.getReg()), Reg)) { MO.unsetIsKill(); } @@ -1056,7 +1056,7 @@ void SimpleRegisterCoalescing::unsetRegisterKills(unsigned Start, unsigned End, bool SimpleRegisterCoalescing::hasRegisterDef(MachineInstr *MI, unsigned Reg) { for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { MachineOperand &MO = MI->getOperand(i); - if (MO.isReg() && MO.isDef() && + if (MO.isRegister() && MO.isDef() && mri_->regsOverlap(rep(MO.getReg()), Reg)) return true; } |