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| author | Evan Cheng <evan.cheng@apple.com> | 2008-09-10 00:30:50 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2008-09-10 00:30:50 +0000 |
| commit | 8ec3389aafb69f5320c32c75442be8deb7f9d70c (patch) | |
| tree | 328e7cf29155c4e6df4bd0c200d6a1aaf7f692ec /lib/CodeGen/SimpleRegisterCoalescing.cpp | |
| parent | 277fc24a7c19aba06fa9d268c5a09a366acf7875 (diff) | |
Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56037 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SimpleRegisterCoalescing.cpp')
| -rw-r--r-- | lib/CodeGen/SimpleRegisterCoalescing.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index 5a386dde06..cca891d773 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -1029,10 +1029,10 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { mri_->getRegClass(isExtSubReg ? SrcReg : DstReg); if (isExtSubReg) { RealDstReg = getMatchingSuperReg(DstReg, SubIdx, RC, tri_); - assert(RealDstReg && "Invalid extra_subreg instruction!"); + assert(RealDstReg && "Invalid extract_subreg instruction!"); } else { RealSrcReg = getMatchingSuperReg(SrcReg, SubIdx, RC, tri_); - assert(RealSrcReg && "Invalid extra_subreg instruction!"); + assert(RealSrcReg && "Invalid extract_subreg instruction!"); } // For this type of EXTRACT_SUBREG, conservatively |